[coreboot-gerrit] Patch merged into coreboot/master: df761ea t124: Skip PLLP init to 408MHz
gerrit at coreboot.org
gerrit at coreboot.org
Thu Nov 13 06:26:44 CET 2014
the following patch was just integrated into master:
commit df761ea005a8116f5000fde42bb04d78869906ac
Author: Jimmy Zhang <jimmzhang at nvidia.com>
Date: Wed Mar 5 11:12:25 2014 -0800
t124: Skip PLLP init to 408MHz
PLLP is configured to 408MHz by hardware on T124. Init PLLP is needed only when
to configure it other than 408MHz.
BUG=none
TEST=build nyan and boot kernel.
Original-Change-Id: I8b1abf510ab886e7fddea8864a6d36f12529880e
Original-Signed-off-by: Jimmy Zhang <jimmzhang at nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/188849
Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
(cherry picked from commit d32124cb7562cbce1bb929c3e5f238b13a27b752)
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
Change-Id: I617f77444a8dd97b20763b50066a1298d3b97724
Reviewed-on: http://review.coreboot.org/7415
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix at chromium.org>
See http://review.coreboot.org/7415 for details.
-gerrit
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