[coreboot-gerrit] Patch set updated for coreboot: f5877f0 siemens/sitemp_g1p1: Fix serial output for simo board
Dennis Wassenberg (dennis.wassenberg@secunet.com)
gerrit at coreboot.org
Wed Oct 15 08:49:19 CEST 2014
Dennis Wassenberg (dennis.wassenberg at secunet.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7060
-gerrit
commit f5877f053505b250b47df41ea43f7a6bc6144d27
Author: Dennis Wassenberg <dennis.wassenberg at secunet.com>
Date: Tue Oct 14 17:29:36 2014 +0200
siemens/sitemp_g1p1: Fix serial output for simo board
The simo board with console output at UART port 1 (COM2) will not produce
any output if CONFIG_UART_FOR_CONSOLE=1 is set correctly.
Commit f29200240e428761827ab8d179fa23068bfa9d59
(superio/ite/*: Factor out generic romstage component)
will only and always activate UART port 0 unregarded to
CONFIG_UART_FOR_CONSOLE value.
Now the UART port which was selected by CONFIG_UART_FOR_CONSOLE
will be enabled and used for console output
Change-Id: Ibbd2b5115b1ed4763962ba32fc9c19431a906c78
Signed-off-by: Dennis Wassenberg <dennis.wassenberg at secunet.com>
---
src/mainboard/siemens/sitemp_g1p1/romstage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c
index 3332999..4beb8c9 100644
--- a/src/mainboard/siemens/sitemp_g1p1/romstage.c
+++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c
@@ -46,7 +46,7 @@
#include "southbridge/amd/sb600/early_setup.c"
#include "northbridge/amd/amdk8/debug.c" /* After sb600_early_setup.c! */
-#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define SERIAL_DEV PNP_DEV(0x2e, CONFIG_UART_FOR_CONSOLE == 1 ? IT8712F_SP2 : IT8712F_SP1)
#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
/* CAN'T BE REMOVED! crt0.S will use it. I don't know WHY!*/
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