[coreboot-gerrit] Patch set updated for coreboot: b3662d8 fsp_rangeley: Switch to per-device ACPI

Vladimir Serbinenko (phcoder@gmail.com) gerrit at coreboot.org
Thu Oct 16 12:31:16 CEST 2014


Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7046

-gerrit

commit b3662d8df52d9c8201c2134d874e9c08e8d9efae
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Sat Oct 11 11:25:41 2014 +0200

    fsp_rangeley: Switch to per-device ACPI
    
    Change-Id: Ic8b2204a6d08d63ac7f05836bf1424f1ca6ee50e
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 src/mainboard/intel/mohonpeak/acpi_tables.c        | 177 +--------------------
 src/northbridge/intel/fsp_rangeley/Kconfig         |   1 +
 src/northbridge/intel/fsp_rangeley/acpi.c          |  14 ++
 src/northbridge/intel/fsp_rangeley/northbridge.c   |  13 ++
 src/northbridge/intel/fsp_rangeley/northbridge.h   |   1 +
 .../intel/fsp_rangeley/acpi/globalnvs.asl          |   3 +-
 src/southbridge/intel/fsp_rangeley/lpc.c           |  28 ++++
 src/southbridge/intel/fsp_rangeley/nvs.h           |   1 +
 8 files changed, 61 insertions(+), 177 deletions(-)

diff --git a/src/mainboard/intel/mohonpeak/acpi_tables.c b/src/mainboard/intel/mohonpeak/acpi_tables.c
index 0349075..b49da65 100644
--- a/src/mainboard/intel/mohonpeak/acpi_tables.c
+++ b/src/mainboard/intel/mohonpeak/acpi_tables.c
@@ -33,14 +33,9 @@
 #include <southbridge/intel/fsp_rangeley/nvs.h>
 #include <northbridge/intel/fsp_rangeley/northbridge.h>
 
-extern const unsigned char AmlCode[];
-#if CONFIG_HAVE_ACPI_SLIC
-unsigned long acpi_create_slic(unsigned long current);
-#endif
-
 static global_nvs_t *gnvs_;
 
-static void acpi_create_gnvs(global_nvs_t *gnvs)
+void acpi_create_gnvs(global_nvs_t *gnvs)
 {
 	gnvs_ = gnvs;
 	memset((void *)gnvs, 0, sizeof(*gnvs));
@@ -89,173 +84,3 @@ unsigned long acpi_fill_madt(unsigned long current)
 
 	return current;
 }
-
-unsigned long acpi_fill_ssdt_generator(unsigned long current,
-					const char *oem_table_id)
-{
-	u32 lens, bmbound;
-	char pscope[] = "\\_SB.PCI0";
-
-	bmbound = sideband_read(B_UNIT, BMBOUND);
-	lens = acpigen_write_scope(pscope);
-	lens += acpigen_write_name_dword("BMBD", bmbound);
-	generate_cpu_entries();
-	acpigen_patch_len(lens - 1);
-	return (unsigned long) (acpigen_get_current());
-}
-
-unsigned long acpi_fill_slit(unsigned long current)
-{
-	// Not implemented
-	return current;
-}
-
-unsigned long acpi_fill_srat(unsigned long current)
-{
-	/* No NUMA, no SRAT */
-	return current;
-}
-
-void smm_setup_structures(void *gnvs, void *tcg, void *smi1);
-
-#define ALIGN_CURRENT current = (ALIGN(current, 16))
-unsigned long write_acpi_tables(unsigned long start)
-{
-	unsigned long current;
-	int i;
-	acpi_rsdp_t *rsdp;
-	acpi_rsdt_t *rsdt;
-	acpi_xsdt_t *xsdt;
-	acpi_hpet_t *hpet;
-	acpi_madt_t *madt;
-	acpi_mcfg_t *mcfg;
-	acpi_fadt_t *fadt;
-	acpi_facs_t *facs;
-#if CONFIG_HAVE_ACPI_SLIC
-	acpi_header_t *slic;
-#endif
-	acpi_header_t *ssdt;
-	acpi_header_t *dsdt;
-
-	current = start;
-
-	/* Align ACPI tables to 16byte */
-	ALIGN_CURRENT;
-
-	printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start);
-
-	/* We need at least an RSDP and an RSDT Table */
-	rsdp = (acpi_rsdp_t *) current;
-	current += sizeof(acpi_rsdp_t);
-	ALIGN_CURRENT;
-	rsdt = (acpi_rsdt_t *) current;
-	current += sizeof(acpi_rsdt_t);
-	ALIGN_CURRENT;
-	xsdt = (acpi_xsdt_t *) current;
-	current += sizeof(acpi_xsdt_t);
-	ALIGN_CURRENT;
-
-	/* clear all table memory */
-	memset((void *) start, 0, current - start);
-
-	acpi_write_rsdp(rsdp, rsdt, xsdt);
-	acpi_write_rsdt(rsdt);
-	acpi_write_xsdt(xsdt);
-
-	printk(BIOS_DEBUG, "ACPI:    * FACS\n");
-	facs = (acpi_facs_t *) current;
-	current += sizeof(acpi_facs_t);
-	ALIGN_CURRENT;
-	acpi_create_facs(facs);
-
-	printk(BIOS_DEBUG, "ACPI:    * DSDT\n");
-	dsdt = (acpi_header_t *) current;
-	memcpy(dsdt, &AmlCode, sizeof(acpi_header_t));
-	current += dsdt->length;
-	memcpy(dsdt, &AmlCode, dsdt->length);
-
-	ALIGN_CURRENT;
-
-	printk(BIOS_DEBUG, "ACPI:    * FADT\n");
-	fadt = (acpi_fadt_t *) current;
-	current += sizeof(acpi_fadt_t);
-	ALIGN_CURRENT;
-
-	acpi_create_fadt(fadt, facs, dsdt);
-	acpi_add_table(rsdp, fadt);
-
-	/*
-	 * We explicitly add these tables later on:
-	 */
-	printk(BIOS_DEBUG, "ACPI:    * HPET\n");
-
-	hpet = (acpi_hpet_t *) current;
-	current += sizeof(acpi_hpet_t);
-	ALIGN_CURRENT;
-	acpi_create_hpet(hpet);
-	acpi_add_table(rsdp, hpet);
-
-	/* If we want to use HPET Timers Linux wants an MADT */
-	printk(BIOS_DEBUG, "ACPI:    * MADT\n");
-
-	madt = (acpi_madt_t *) current;
-	acpi_create_madt(madt);
-	current += madt->header.length;
-	ALIGN_CURRENT;
-	acpi_add_table(rsdp, madt);
-
-	printk(BIOS_DEBUG, "ACPI:    * MCFG\n");
-	mcfg = (acpi_mcfg_t *) current;
-	acpi_create_mcfg(mcfg);
-	current += mcfg->header.length;
-	ALIGN_CURRENT;
-	acpi_add_table(rsdp, mcfg);
-
-	/* Pack GNVS into the ACPI table area */
-	for (i=0; i < dsdt->length; i++) {
-		if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) {
-			printk(BIOS_DEBUG, "ACPI: Patching up global NVS in "
-			     "DSDT at offset 0x%04x -> 0x%08lx\n", i, current);
-			*(u32*)(((u32)dsdt) + i) = current; // 0x92 bytes
-			acpi_save_gnvs(current);
-			break;
-		}
-	}
-
-	/* And fill it */
-	acpi_create_gnvs((global_nvs_t *)current);
-
-	/* And tell SMI about it */
-#if CONFIG_HAVE_SMI_HANDLER
-	smm_setup_structures((void *)current, NULL, NULL);
-#endif
-
-	current += sizeof(global_nvs_t);
-	ALIGN_CURRENT;
-
-	/* We patched up the DSDT, so we need to recalculate the checksum */
-	dsdt->checksum = 0;
-	dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length);
-
-	printk(BIOS_DEBUG, "ACPI:     * DSDT @ %p Length %x\n", dsdt,
-		     dsdt->length);
-
-#if CONFIG_HAVE_ACPI_SLIC
-	printk(BIOS_DEBUG, "ACPI:     * SLIC\n");
-	slic = (acpi_header_t *)current;
-	current += acpi_create_slic(current);
-	ALIGN_CURRENT;
-	acpi_add_table(rsdp, slic);
-#endif
-
-	printk(BIOS_DEBUG, "ACPI:     * SSDT\n");
-	ssdt = (acpi_header_t *)current;
-	acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR);
-	current += ssdt->length;
-	acpi_add_table(rsdp, ssdt);
-	ALIGN_CURRENT;
-
-	printk(BIOS_DEBUG, "current = %lx\n", current);
-	printk(BIOS_INFO, "ACPI: done.\n");
-	return current;
-}
diff --git a/src/northbridge/intel/fsp_rangeley/Kconfig b/src/northbridge/intel/fsp_rangeley/Kconfig
index c1353ca..2d2eda7 100644
--- a/src/northbridge/intel/fsp_rangeley/Kconfig
+++ b/src/northbridge/intel/fsp_rangeley/Kconfig
@@ -21,6 +21,7 @@
 config NORTHBRIDGE_INTEL_FSP_RANGELEY
 	bool
 	select CPU_INTEL_FSP_MODEL_406DX
+	select PER_DEVICE_ACPI_TABLES
 
 if NORTHBRIDGE_INTEL_FSP_RANGELEY
 
diff --git a/src/northbridge/intel/fsp_rangeley/acpi.c b/src/northbridge/intel/fsp_rangeley/acpi.c
index 895f5b4..a83ce47 100644
--- a/src/northbridge/intel/fsp_rangeley/acpi.c
+++ b/src/northbridge/intel/fsp_rangeley/acpi.c
@@ -30,6 +30,8 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <build.h>
+#include <arch/acpi.h>
+#include <arch/acpigen.h>
 #include "northbridge.h"
 
 unsigned long acpi_fill_mcfg(unsigned long current)
@@ -64,3 +66,15 @@ unsigned long acpi_fill_mcfg(unsigned long current)
 
 	return current;
 }
+
+void northbridge_acpi_fill_ssdt_generator(void)
+{
+	u32 lens, bmbound;
+	char pscope[] = "\\_SB.PCI0";
+
+	bmbound = sideband_read(B_UNIT, BMBOUND);
+	lens = acpigen_write_scope(pscope);
+	lens += acpigen_write_name_dword("BMBD", bmbound);
+	acpigen_patch_len(lens - 1);
+	generate_cpu_entries();
+}
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c
index 98c0b9c..568dcf6 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.c
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.c
@@ -212,6 +212,18 @@ static void northbridge_enable(device_t dev)
 {
 }
 
+unsigned long acpi_fill_slit(unsigned long current)
+{
+	// Not implemented
+	return current;
+}
+
+unsigned long acpi_fill_srat(unsigned long current)
+{
+	/* No NUMA, no SRAT */
+	return current;
+}
+
 static struct pci_operations intel_pci_ops = {
 	.set_subsystem    = intel_set_subsystem,
 };
@@ -231,6 +243,7 @@ static struct device_operations mc_ops = {
 	.set_resources    = mc_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init             = northbridge_init,
+	.acpi_fill_ssdt_generator = northbridge_acpi_fill_ssdt_generator,
 	.enable           = northbridge_enable,
 	.scan_bus         = 0,
 	.ops_pci          = &intel_pci_ops,
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.h b/src/northbridge/intel/fsp_rangeley/northbridge.h
index 855a056..abce07a 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.h
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.h
@@ -72,6 +72,7 @@ void dump_pci_devices(void);
 void dump_spd_registers(void);
 void dump_mem(unsigned start, unsigned end);
 void report_platform_info(void);
+void northbridge_acpi_fill_ssdt_generator(void);
 
 #endif /* #ifndef __ASSEMBLER__ */
 #endif /* #ifndef __ACPI__ */
diff --git a/src/southbridge/intel/fsp_rangeley/acpi/globalnvs.asl b/src/southbridge/intel/fsp_rangeley/acpi/globalnvs.asl
index 21209db..c5c1a9a 100644
--- a/src/southbridge/intel/fsp_rangeley/acpi/globalnvs.asl
+++ b/src/southbridge/intel/fsp_rangeley/acpi/globalnvs.asl
@@ -32,7 +32,8 @@ Name(\DSEN, 1)		// Display Output Switching Enable
  */
 
 
-OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0xf00)
+External(NVSA)
+OperationRegion (GNVS, SystemMemory, NVSA, 0xf00)
 Field (GNVS, ByteAcc, NoLock, Preserve)
 {
 	/* Miscellaneous */
diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c
index 8576b61..f9911dd 100644
--- a/src/southbridge/intel/fsp_rangeley/lpc.c
+++ b/src/southbridge/intel/fsp_rangeley/lpc.c
@@ -31,8 +31,13 @@
 #include <arch/acpi.h>
 #include <cpu/cpu.h>
 #include <elog.h>
+#include <string.h>
+#include <cbmem.h>
+#include <arch/acpi.h>
+#include <arch/acpigen.h>
 #include "soc.h"
 #include "irq.h"
+#include "nvs.h"
 
 #define NMI_OFF	0
 
@@ -426,6 +431,27 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	}
 }
 
+static void southbridge_inject_dsdt(void)
+{
+	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+
+	if (gnvs) {
+		int scopelen;
+		memset(gnvs, 0, sizeof(*gnvs));
+		acpi_create_gnvs(gnvs);
+		acpi_save_gnvs((unsigned long)gnvs);
+#if CONFIG_HAVE_SMI_HANDLER
+		/* And tell SMI about it */
+		smm_setup_structures(gnvs, NULL, NULL);
+#endif
+
+		/* Add it to DSDT.  */
+		scopelen = acpigen_write_scope("\\");
+		scopelen += acpigen_write_name_dword("NVSA", (u32) gnvs);
+		acpigen_patch_len(scopelen - 1);
+	}
+}
+
 static struct pci_operations pci_ops = {
 	.set_subsystem = set_subsystem,
 };
@@ -435,6 +461,8 @@ static struct device_operations device_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= soc_lpc_enable_resources,
 	.init			= lpc_init,
+	.write_acpi_tables      = acpi_write_hpet,
+	.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
 	.enable			= soc_lpc_enable,
 	.scan_bus		= scan_static_bus,
 	.ops_pci		= &pci_ops,
diff --git a/src/southbridge/intel/fsp_rangeley/nvs.h b/src/southbridge/intel/fsp_rangeley/nvs.h
index dce23e0..6578bbf 100644
--- a/src/southbridge/intel/fsp_rangeley/nvs.h
+++ b/src/southbridge/intel/fsp_rangeley/nvs.h
@@ -149,6 +149,7 @@ typedef struct {
 
 } __attribute__((packed)) global_nvs_t;
 
+void acpi_create_gnvs(global_nvs_t *gnvs);
 #ifdef __SMM__
 /* Used in SMM to find the ACPI GNVS address */
 global_nvs_t *smm_get_gnvs(void);



More information about the coreboot-gerrit mailing list