[coreboot-gerrit] Patch set updated for coreboot: c98206e Fix ICH spi implementation which reads data from different chips.
Philipp Deppenwiese (zaolin@das-labor.org)
gerrit at coreboot.org
Fri Oct 17 16:37:46 CEST 2014
Philipp Deppenwiese (zaolin at das-labor.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7105
-gerrit
commit c98206e801c90cdacad8b587c8010d1ccdde4322
Author: Philipp Deppenwiese <zaolin at das-labor.org>
Date: Fri Oct 17 16:10:32 2014 +0200
Fix ICH spi implementation which reads data from different chips.
This patch adjusts the read timeout in order to support flash chips
which needs more than 60ms to complete a spi command.
This problem can be reproduced on a Thinkpad T520 with M25PX64 spi chip ( suspend to ram bug ).
Change-Id: I22b2e59f1855ead6162a292b83b9b854b55c0235
Signed-off-by: Philipp Deppenwiese <zaolin at das-labor.org>
---
src/southbridge/intel/common/spi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c
index 8e7192b..2ea9a24 100644
--- a/src/southbridge/intel/common/spi.c
+++ b/src/southbridge/intel/common/spi.c
@@ -517,7 +517,7 @@ static int spi_setup_offset(spi_transaction *trans)
}
/*
- * Wait for up to 60ms til status register bit(s) turn 1 (in case wait_til_set
+ * Wait for up to 6s til status register bit(s) turn 1 (in case wait_til_set
* below is True) or 0. In case the wait was for the bit(s) to set - write
* those bits back, which would cause resetting them.
*
@@ -525,7 +525,7 @@ static int spi_setup_offset(spi_transaction *trans)
*/
static int ich_status_poll(u16 bitmask, int wait_til_set)
{
- int timeout = 6000; /* This will result in 60 ms */
+ int timeout = 600000; /* This will result in 6 seconds */
u16 status = 0;
while (timeout--) {
@@ -538,7 +538,7 @@ static int ich_status_poll(u16 bitmask, int wait_til_set)
udelay(10);
}
- printk(BIOS_DEBUG, "ICH SPI: SCIP timeout, read %x, expected %x\n",
+ printk(BIOS_DEBUG, "ICH SPI: SCIP timeout, read %x, bitmask %x\n",
status, bitmask);
return -1;
}
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