[coreboot-gerrit] Patch set updated for coreboot: 1388cd3 AGESA boards: Fix early agesawrapper_amdinitmmio()
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Wed Oct 22 07:18:05 CEST 2014
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7059
-gerrit
commit 1388cd3cbccf44a2014de54e884a944df7740d0e
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Mon Oct 20 07:04:55 2014 +0300
AGESA boards: Fix early agesawrapper_amdinitmmio()
Regression introduced with commit
7b23ae0 AGESA: Trace execution with AGESAWRAPPER()
As the call is made before console_init() is called it must
not call any printk(). Debugging Olivehill and Parmer platforms
using a custom FPGA (as these boards have no Super-IO UART) have
been observed to halt and/or delay at early boot.
Change-Id: I3ab4e5378db44aece9046c8636cde1053ce5390d
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/mainboard/amd/olivehill/romstage.c | 2 +-
src/mainboard/amd/olivehillplus/romstage.c | 10 +---------
src/mainboard/amd/parmer/romstage.c | 3 ++-
src/mainboard/amd/thatcher/romstage.c | 2 +-
src/mainboard/amd/torpedo/romstage.c | 2 +-
src/mainboard/asrock/imb-a180/romstage.c | 2 +-
src/mainboard/asus/f2a85-m/romstage.c | 2 +-
src/mainboard/hp/pavilion_m6_1035dx/romstage.c | 2 +-
src/mainboard/supermicro/h8qgi/romstage.c | 2 +-
src/mainboard/supermicro/h8scm/romstage.c | 2 +-
src/mainboard/tyan/s8226/romstage.c | 2 +-
src/northbridge/amd/agesa/agesawrapper_call.h | 2 ++
12 files changed, 14 insertions(+), 19 deletions(-)
diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c
index 326a41a..4c1b18e 100644
--- a/src/mainboard/amd/olivehill/romstage.c
+++ b/src/mainboard/amd/olivehill/romstage.c
@@ -51,7 +51,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
outb(0xD2, 0xcd6);
outb(0x00, 0xcd7);
- AGESAWRAPPER(amdinitmmio);
+ AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
hudson_lpc_port80();
diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c
index 88f1163..6f300ce 100644
--- a/src/mainboard/amd/olivehillplus/romstage.c
+++ b/src/mainboard/amd/olivehillplus/romstage.c
@@ -41,7 +41,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
volatile int halt = 0;
- AGESA_STATUS status = AGESA_UNSUPPORTED;
/*
* In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for
@@ -54,14 +53,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
outb(0xD2, 0xcd6);
outb(0x00, 0xcd7);
- /*
- * The following should be a call to AGESAWRAPPER() macro, but
- * that would use console output before it is initialized.
- */
- status = agesawrapper_amdinitmmio();
- if (AGESA_SUCCESS != status) {
- printk(BIOS_WARNING, "AmdInitMmio reported %s\n", decodeAGESA_STATUS(status));
- }
+ AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
hudson_lpc_port80();
diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c
index 7c143f4..7aa246c 100644
--- a/src/mainboard/amd/parmer/romstage.c
+++ b/src/mainboard/amd/parmer/romstage.c
@@ -42,7 +42,8 @@
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
- AGESAWRAPPER(amdinitmmio);
+
+ AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
hudson_lpc_port80();
diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c
index 8ee42bd..cc97866 100644
--- a/src/mainboard/amd/thatcher/romstage.c
+++ b/src/mainboard/amd/thatcher/romstage.c
@@ -47,7 +47,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val;
u8 byte;
device_t dev;
- AGESAWRAPPER(amdinitmmio);
+ AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
hudson_lpc_port80();
//__asm__ volatile ("1: jmp 1b");
diff --git a/src/mainboard/amd/torpedo/romstage.c b/src/mainboard/amd/torpedo/romstage.c
index 7ed520a..1b12f73 100644
--- a/src/mainboard/amd/torpedo/romstage.c
+++ b/src/mainboard/amd/torpedo/romstage.c
@@ -45,7 +45,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val;
post_code(0x35);
- AGESAWRAPPER(amdinitmmio);
+ AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
if (!cpu_init_detectedx && boot_cpu()) {
post_code(0x30);
diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c
index 37f14f6..cabcde8 100644
--- a/src/mainboard/asrock/imb-a180/romstage.c
+++ b/src/mainboard/asrock/imb-a180/romstage.c
@@ -56,7 +56,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//outb(0xD2, 0xcd6);
//outb(0x00, 0xcd7);
- AGESAWRAPPER(amdinitmmio);
+ AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
hudson_lpc_port80();
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index bdf03a7..caa32ca 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -76,7 +76,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
hudson_lpc_port80();
#endif
- AGESAWRAPPER(amdinitmmio);
+ AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
if (!cpu_init_detectedx && boot_cpu()) {
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
index ea848b4..01f463a 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
@@ -39,7 +39,7 @@
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
- AGESAWRAPPER(amdinitmmio);
+ AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
hudson_lpc_port80();
diff --git a/src/mainboard/supermicro/h8qgi/romstage.c b/src/mainboard/supermicro/h8qgi/romstage.c
index 425f677..bd358c9 100644
--- a/src/mainboard/supermicro/h8qgi/romstage.c
+++ b/src/mainboard/supermicro/h8qgi/romstage.c
@@ -46,7 +46,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val;
post_code(0x30);
- agesawrapper_amdinitmmio();
+ AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
post_code(0x31);
/* Halt if there was a built in self test failure */
diff --git a/src/mainboard/supermicro/h8scm/romstage.c b/src/mainboard/supermicro/h8scm/romstage.c
index da92d97..1b642c4 100644
--- a/src/mainboard/supermicro/h8scm/romstage.c
+++ b/src/mainboard/supermicro/h8scm/romstage.c
@@ -45,7 +45,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val;
post_code(0x30);
- agesawrapper_amdinitmmio();
+ AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
post_code(0x31);
/* Halt if there was a built in self test failure */
diff --git a/src/mainboard/tyan/s8226/romstage.c b/src/mainboard/tyan/s8226/romstage.c
index dc3bde2..bbeabbc 100644
--- a/src/mainboard/tyan/s8226/romstage.c
+++ b/src/mainboard/tyan/s8226/romstage.c
@@ -44,7 +44,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val;
post_code(0x30);
- agesawrapper_amdinitmmio();
+ AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
post_code(0x31);
/* Halt if there was a built in self test failure */
diff --git a/src/northbridge/amd/agesa/agesawrapper_call.h b/src/northbridge/amd/agesa/agesawrapper_call.h
index 0acbeee..792c3b1 100644
--- a/src/northbridge/amd/agesa/agesawrapper_call.h
+++ b/src/northbridge/amd/agesa/agesawrapper_call.h
@@ -57,4 +57,6 @@ static inline u32 do_agesawrapper(AGESA_STATUS (*func)(void), const char *name)
#define AGESAWRAPPER(func) do_agesawrapper(agesawrapper_ ## func, #func)
+#define AGESAWRAPPER_PRE_CONSOLE(func) agesawrapper_ ## func()
+
#endif
More information about the coreboot-gerrit
mailing list