[coreboot-gerrit] New patch to review for coreboot: 3821cff amd/olivehillplus: Split agesawrapper header
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Wed Oct 22 07:18:15 CEST 2014
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7150
-gerrit
commit 3821cffb4ebba1af8553b235530d1f0856c73753
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Wed Oct 22 08:05:36 2014 +0300
amd/olivehillplus: Split agesawrapper header
This is common header for all AMD PI implementations.
Change-Id: Ifabfce97db749e04aa19e53f62216be78158b282
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/cpu/amd/pi/amd_late_init.c | 2 +-
src/mainboard/amd/olivehillplus/PlatformGnbPcie.c | 2 +-
.../amd/olivehillplus/PlatformGnbPcieComplex.h | 31 -----------
src/mainboard/amd/olivehillplus/acpi_tables.c | 2 +-
src/mainboard/amd/olivehillplus/agesawrapper.c | 3 +-
src/mainboard/amd/olivehillplus/agesawrapper.h | 61 ---------------------
src/mainboard/amd/olivehillplus/mainboard.c | 2 +-
src/mainboard/amd/olivehillplus/romstage.c | 2 +-
src/northbridge/amd/pi/00730F01/northbridge.c | 2 +-
src/northbridge/amd/pi/agesawrapper.h | 63 ++++++++++++++++++++++
10 files changed, 70 insertions(+), 100 deletions(-)
diff --git a/src/cpu/amd/pi/amd_late_init.c b/src/cpu/amd/pi/amd_late_init.c
index efb1667..46116ca 100644
--- a/src/cpu/amd/pi/amd_late_init.c
+++ b/src/cpu/amd/pi/amd_late_init.c
@@ -24,7 +24,7 @@
#include <device/pci_def.h>
#include <device/pci_ops.h>
-#include <agesawrapper.h>
+#include <northbridge/amd/pi/agesawrapper.h>
#include <northbridge/amd/pi/agesawrapper_call.h>
static void agesawrapper_post_device(void *unused)
diff --git a/src/mainboard/amd/olivehillplus/PlatformGnbPcie.c b/src/mainboard/amd/olivehillplus/PlatformGnbPcie.c
index 71a5e6c..4e5382a 100644
--- a/src/mainboard/amd/olivehillplus/PlatformGnbPcie.c
+++ b/src/mainboard/amd/olivehillplus/PlatformGnbPcie.c
@@ -17,7 +17,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include "PlatformGnbPcieComplex.h"
+#include <northbridge/amd/pi/agesawrapper.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
diff --git a/src/mainboard/amd/olivehillplus/PlatformGnbPcieComplex.h b/src/mainboard/amd/olivehillplus/PlatformGnbPcieComplex.h
deleted file mode 100644
index cf3beb9..0000000
--- a/src/mainboard/amd/olivehillplus/PlatformGnbPcieComplex.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
-#define _PLATFORM_GNB_PCIE_COMPLEX_H
-
-#include <Porting.h>
-#include <AGESA.h>
-
-VOID
-OemCustomizeInitEarly (
- IN OUT AMD_EARLY_PARAMS *InitEarly
- );
-
-#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/amd/olivehillplus/acpi_tables.c b/src/mainboard/amd/olivehillplus/acpi_tables.c
index e066f15..7b53564 100644
--- a/src/mainboard/amd/olivehillplus/acpi_tables.c
+++ b/src/mainboard/amd/olivehillplus/acpi_tables.c
@@ -17,7 +17,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include "agesawrapper.h"
+#include <northbridge/amd/pi/agesawrapper.h>
#include <console/console.h>
#include <string.h>
diff --git a/src/mainboard/amd/olivehillplus/agesawrapper.c b/src/mainboard/amd/olivehillplus/agesawrapper.c
index 9d433db..fb38b6a 100644
--- a/src/mainboard/amd/olivehillplus/agesawrapper.c
+++ b/src/mainboard/amd/olivehillplus/agesawrapper.c
@@ -21,7 +21,7 @@
#include <string.h>
#include <config.h>
#include <cpu/x86/mtrr.h>
-#include "agesawrapper.h"
+#include <northbridge/amd/pi/agesawrapper.h>
#include <northbridge/amd/pi/BiosCallOuts.h>
#include "cpuRegisters.h"
#include "cpuCacheInit.h"
@@ -31,7 +31,6 @@
#include "Dispatcher.h"
#include "cpuCacheInit.h"
#include "amdlib.h"
-#include "PlatformGnbPcieComplex.h"
#include "Filecode.h"
#include "heapManager.h"
#include "FchPlatform.h"
diff --git a/src/mainboard/amd/olivehillplus/agesawrapper.h b/src/mainboard/amd/olivehillplus/agesawrapper.h
deleted file mode 100644
index 6d2e802..0000000
--- a/src/mainboard/amd/olivehillplus/agesawrapper.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _AGESAWRAPPER_H_
-#define _AGESAWRAPPER_H_
-
-#include <stdint.h>
-#include "Porting.h"
-#include "AGESA.h"
-
-/* Define AMD APU and SoC SSID/SVID */
-#define AMD_APU_SVID 0x1022
-#define AMD_APU_SSID 0x1234
-#define PCIE_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
-
-enum {
- PICK_DMI, /* DMI Interface */
- PICK_PSTATE, /* Acpi Pstate SSDT Table */
- PICK_SRAT, /* SRAT Table */
- PICK_SLIT, /* SLIT Table */
- PICK_WHEA_MCE, /* WHEA MCE table */
- PICK_WHEA_CMC, /* WHEA CMV table */
- PICK_ALIB, /* SACPI SSDT table with ALIB implementation */
- PICK_IVRS, /* IOMMU ACPI IVRS(I/O Virtualization Reporting Structure) table */
-};
-
-AGESA_STATUS agesawrapper_amdinitreset(void);
-AGESA_STATUS agesawrapper_amdinitearly(void);
-AGESA_STATUS agesawrapper_amdinitenv(void);
-AGESA_STATUS agesawrapper_amdinitlate(void);
-AGESA_STATUS agesawrapper_amdinitpost(void);
-AGESA_STATUS agesawrapper_amdinitmid(void);
-AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus);
-AGESA_STATUS agesawrapper_amdinitmmio(void);
-AGESA_STATUS agesawrapper_amdinitcpuio(void);
-void *agesawrapper_getlateinitptr(int pick);
-AGESA_STATUS agesawrapper_amdlaterunaptask(UINT32 Func, UINT32 Data, void *ConfigPtr);
-AGESA_STATUS agesawrapper_amdS3Save(void);
-AGESA_STATUS agesawrapper_amdinitresume(void);
-AGESA_STATUS agesawrapper_amds3laterestore(void);
-
-AGESA_STATUS agesawrapper_fchs3earlyrestore(void);
-AGESA_STATUS agesawrapper_fchs3laterestore(void);
-
-#endif /* _AGESAWRAPPER_H_ */
diff --git a/src/mainboard/amd/olivehillplus/mainboard.c b/src/mainboard/amd/olivehillplus/mainboard.c
index f4fbb92..9be33b6 100644
--- a/src/mainboard/amd/olivehillplus/mainboard.c
+++ b/src/mainboard/amd/olivehillplus/mainboard.c
@@ -25,7 +25,7 @@
#include <arch/acpi.h>
#include <northbridge/amd/pi/BiosCallOuts.h>
#include <cpu/amd/pi/s3_resume.h>
-#include "agesawrapper.h"
+#include <northbridge/amd/pi/agesawrapper.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c
index 8e3cbad..709487e 100644
--- a/src/mainboard/amd/olivehillplus/romstage.c
+++ b/src/mainboard/amd/olivehillplus/romstage.c
@@ -30,7 +30,7 @@
#include <console/console.h>
#include <console/loglevel.h>
#include "cpu/amd/car.h"
-#include "agesawrapper.h"
+#include <northbridge/amd/pi/agesawrapper.h>
#include <northbridge/amd/pi/agesawrapper_call.h>
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index bfef6c3..6ede66c 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -38,7 +38,7 @@
#include <Topology.h>
#include <cpu/amd/amdfam16.h>
#include <cpuRegisters.h>
-#include "agesawrapper.h"
+#include <northbridge/amd/pi/agesawrapper.h>
#include <northbridge/amd/pi/agesawrapper_call.h>
#include "northbridge.h"
diff --git a/src/northbridge/amd/pi/agesawrapper.h b/src/northbridge/amd/pi/agesawrapper.h
new file mode 100644
index 0000000..b345567
--- /dev/null
+++ b/src/northbridge/amd/pi/agesawrapper.h
@@ -0,0 +1,63 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef _AGESAWRAPPER_H_
+#define _AGESAWRAPPER_H_
+
+#include <stdint.h>
+#include "Porting.h"
+#include "AGESA.h"
+
+/* Define AMD APU and SoC SSID/SVID */
+#define AMD_APU_SVID 0x1022
+#define AMD_APU_SSID 0x1234
+#define PCIE_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
+
+enum {
+ PICK_DMI, /* DMI Interface */
+ PICK_PSTATE, /* Acpi Pstate SSDT Table */
+ PICK_SRAT, /* SRAT Table */
+ PICK_SLIT, /* SLIT Table */
+ PICK_WHEA_MCE, /* WHEA MCE table */
+ PICK_WHEA_CMC, /* WHEA CMV table */
+ PICK_ALIB, /* SACPI SSDT table with ALIB implementation */
+ PICK_IVRS, /* IOMMU ACPI IVRS(I/O Virtualization Reporting Structure) table */
+};
+
+AGESA_STATUS agesawrapper_amdinitreset(void);
+AGESA_STATUS agesawrapper_amdinitearly(void);
+AGESA_STATUS agesawrapper_amdinitenv(void);
+AGESA_STATUS agesawrapper_amdinitlate(void);
+AGESA_STATUS agesawrapper_amdinitpost(void);
+AGESA_STATUS agesawrapper_amdinitmid(void);
+AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus);
+AGESA_STATUS agesawrapper_amdinitmmio(void);
+AGESA_STATUS agesawrapper_amdinitcpuio(void);
+void *agesawrapper_getlateinitptr(int pick);
+AGESA_STATUS agesawrapper_amdlaterunaptask(UINT32 Func, UINT32 Data, void *ConfigPtr);
+AGESA_STATUS agesawrapper_amdS3Save(void);
+AGESA_STATUS agesawrapper_amdinitresume(void);
+AGESA_STATUS agesawrapper_amds3laterestore(void);
+
+AGESA_STATUS agesawrapper_fchs3earlyrestore(void);
+AGESA_STATUS agesawrapper_fchs3laterestore(void);
+
+VOID OemCustomizeInitEarly (IN OUT AMD_EARLY_PARAMS *InitEarly);
+
+#endif /* _AGESAWRAPPER_H_ */
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