[coreboot-gerrit] New patch to review for coreboot: 0146324 southbridge/dmp/vortex86ex/southbridge.c: Don't hide pointers behind typedefs

[Edward O'Callaghan (eocallaghan@alterapraxis.com)]

Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7170

-gerrit

commit 0146324a434d680b1357d7a99ae5c10eb3ceb79c
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Thu Oct 23 02:19:10 2014 +1100

    southbridge/dmp/vortex86ex/southbridge.c: Don't hide pointers behind typedefs
    
    Change-Id: Ic67612f70ad54ca6333edaddf9e17d50e951d6b4
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/southbridge/dmp/vortex86ex/southbridge.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/southbridge/dmp/vortex86ex/southbridge.c b/src/southbridge/dmp/vortex86ex/southbridge.c
index a2b1246..2cfe005 100644
--- a/src/southbridge/dmp/vortex86ex/southbridge.c
+++ b/src/southbridge/dmp/vortex86ex/southbridge.c
@@ -95,7 +95,7 @@ static const unsigned char irq_to_int_routing[16] = {
 /* keyboard controller system flag timeout : 400 ms */
 #define KBC_TIMEOUT_SYS_FLAG 400
 
-static u8 get_pci_dev_func(device_t dev)
+static u8 get_pci_dev_func(struct device * dev)
 {
 	return PCI_FUNC(dev->path.pci.devfn);
 }
@@ -182,7 +182,7 @@ static void pci_routing_fixup(struct device *dev)
 	/* Read PCI slot IRQs to see if RT1-3 is used, and enables it */
 	for (i = 0; i < slot_num; i++) {
 		unsigned int funct;
-		device_t pdev;
+		struct device * pdev;
 		u8 irq;
 
 		/* Each slot may contain up to eight functions. */
@@ -515,7 +515,7 @@ static void fix_cmos_rtc_time(void)
 	}
 }
 
-static void vortex86_sb_set_io_resv(device_t dev, unsigned index, u32 base, u32 size)
+static void vortex86_sb_set_io_resv(struct device * dev, unsigned index, u32 base, u32 size)
 {
 	struct resource *res;
 	res = new_resource(dev, index);
@@ -525,7 +525,7 @@ static void vortex86_sb_set_io_resv(device_t dev, unsigned index, u32 base, u32
 	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }
 
-static void vortex86_sb_set_spi_flash_size(device_t dev, unsigned index, u32 flash_size)
+static void vortex86_sb_set_spi_flash_size(struct device * dev, unsigned index, u32 flash_size)
 {
 	/* SPI flash is in topmost of 4G memory space */
 	struct resource *res;
@@ -536,7 +536,7 @@ static void vortex86_sb_set_spi_flash_size(device_t dev, unsigned index, u32 fla
 	res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 }
 
-static void vortex86_sb_read_resources(device_t dev)
+static void vortex86_sb_read_resources(struct device * dev)
 {
 	u32 flash_size = 8 * 1024 * 1024;