[coreboot-gerrit] Patch set updated for coreboot: ba4f070 southbridge/broadcombcm5785: Don't hide pointers behind typedefs
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Wed Oct 22 19:46:13 CEST 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7169
-gerrit
commit ba4f07021bfd72bd3299e7f30402408377826186
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Thu Oct 23 02:09:00 2014 +1100
southbridge/broadcombcm5785: Don't hide pointers behind typedefs
Change-Id: Id6c221cc36a2b89db7b11796d947136bac76e565
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/southbridge/broadcom/bcm5780/nic.c | 2 +-
src/southbridge/broadcom/bcm5780/pcix.c | 2 +-
src/southbridge/broadcom/bcm5785/bcm5785.c | 6 +++---
src/southbridge/broadcom/bcm5785/bcm5785.h | 2 +-
src/southbridge/broadcom/bcm5785/bootblock.c | 2 +-
src/southbridge/broadcom/bcm5785/early_setup.c | 10 +++++-----
src/southbridge/broadcom/bcm5785/early_smbus.c | 2 +-
src/southbridge/broadcom/bcm5785/ide.c | 4 ++--
src/southbridge/broadcom/bcm5785/lpc.c | 12 ++++++------
src/southbridge/broadcom/bcm5785/reset.c | 6 +++---
src/southbridge/broadcom/bcm5785/sata.c | 2 +-
src/southbridge/broadcom/bcm5785/sb_pci_main.c | 14 +++++++-------
src/southbridge/broadcom/bcm5785/usb.c | 2 +-
13 files changed, 33 insertions(+), 33 deletions(-)
diff --git a/src/southbridge/broadcom/bcm5780/nic.c b/src/southbridge/broadcom/bcm5780/nic.c
index df59fdc..5fd56dd 100644
--- a/src/southbridge/broadcom/bcm5780/nic.c
+++ b/src/southbridge/broadcom/bcm5780/nic.c
@@ -25,7 +25,7 @@
#include <device/pci_ops.h>
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device * dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x40,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/broadcom/bcm5780/pcix.c b/src/southbridge/broadcom/bcm5780/pcix.c
index 92a3547..96d0ace 100644
--- a/src/southbridge/broadcom/bcm5780/pcix.c
+++ b/src/southbridge/broadcom/bcm5780/pcix.c
@@ -24,7 +24,7 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device * dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x40,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.c b/src/southbridge/broadcom/bcm5785/bcm5785.c
index 1675097..822b3ba 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785.c
@@ -24,10 +24,10 @@
#include <device/pci_ids.h>
#include "bcm5785.h"
-void bcm5785_enable(device_t dev)
+void bcm5785_enable(struct device * dev)
{
- device_t sb_pci_main_dev;
- device_t bus_dev;
+ struct device * sb_pci_main_dev;
+ struct device * bus_dev;
// unsigned index;
/* See if we are on the behind the pcix bridge */
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.h b/src/southbridge/broadcom/bcm5785/bcm5785.h
index bc3280f..5eb2f05 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785.h
+++ b/src/southbridge/broadcom/bcm5785/bcm5785.h
@@ -24,7 +24,7 @@
#include "chip.h"
#ifndef __PRE_RAM__
-void bcm5785_enable(device_t dev);
+void bcm5785_enable(struct device * dev);
#else
void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn);
#endif
diff --git a/src/southbridge/broadcom/bcm5785/bootblock.c b/src/southbridge/broadcom/bcm5785/bootblock.c
index 166464c..23833a0 100644
--- a/src/southbridge/broadcom/bcm5785/bootblock.c
+++ b/src/southbridge/broadcom/bcm5785/bootblock.c
@@ -26,7 +26,7 @@
static void bcm5785_enable_rom(void)
{
u8 byte;
- device_t dev;
+ struct device * dev;
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SERVERWORKS,
PCI_DEVICE_ID_SERVERWORKS_BCM5785_SB_PCI_MAIN), 0);
diff --git a/src/southbridge/broadcom/bcm5785/early_setup.c b/src/southbridge/broadcom/bcm5785/early_setup.c
index 9dee295..fe0fded 100644
--- a/src/southbridge/broadcom/bcm5785/early_setup.c
+++ b/src/southbridge/broadcom/bcm5785/early_setup.c
@@ -24,7 +24,7 @@
static void bcm5785_enable_lpc(void)
{
uint8_t byte;
- device_t dev;
+ pci_devfn_t dev;
dev = pci_locate_device(PCI_ID(0x1166, 0x0234), 0);
@@ -43,7 +43,7 @@ static void bcm5785_enable_lpc(void)
static void bcm5785_enable_wdt_port_cf9(void)
{
- device_t dev;
+ pci_devfn_t dev;
uint32_t dword;
uint32_t dword_old;
@@ -69,7 +69,7 @@ static void bcm5785_enable_wdt_port_cf9(void)
unsigned get_sbdn(unsigned bus)
{
- device_t dev;
+ pci_devfn_t dev;
/* Find the device.
* There can only be one bcm5785 on a hypertransport chain/bus.
@@ -134,7 +134,7 @@ void soft_reset(void)
static void bcm5785_enable_msg(void)
{
- device_t dev;
+ pci_devfn_t dev;
uint32_t dword;
uint32_t dword_old;
uint8_t byte;
@@ -162,7 +162,7 @@ static void bcm5785_early_setup(void)
{
uint8_t byte;
uint32_t dword;
- device_t dev;
+ pci_devfn_t dev;
//F0
// enable device on bcm5785 at first
diff --git a/src/southbridge/broadcom/bcm5785/early_smbus.c b/src/southbridge/broadcom/bcm5785/early_smbus.c
index 38e58f8..200da09 100644
--- a/src/southbridge/broadcom/bcm5785/early_smbus.c
+++ b/src/southbridge/broadcom/bcm5785/early_smbus.c
@@ -24,7 +24,7 @@
static void enable_smbus(void)
{
- device_t dev;
+ pci_devfn_t dev;
dev = pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201?
if (dev == PCI_DEV_INVALID) {
diff --git a/src/southbridge/broadcom/bcm5785/ide.c b/src/southbridge/broadcom/bcm5785/ide.c
index 3426a2c..948fef0 100644
--- a/src/southbridge/broadcom/bcm5785/ide.c
+++ b/src/southbridge/broadcom/bcm5785/ide.c
@@ -25,7 +25,7 @@
#include <device/pci_ops.h>
#include "bcm5785.h"
-static void bcm5785_ide_read_resources(device_t dev)
+static void bcm5785_ide_read_resources(struct device * dev)
{
/* Get the normal pci resources of this device */
pci_dev_read_resources(dev);
@@ -40,7 +40,7 @@ static void ide_init(struct device *dev)
{
}
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device * dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x40,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/broadcom/bcm5785/lpc.c b/src/southbridge/broadcom/bcm5785/lpc.c
index af79892..5cf1376 100644
--- a/src/southbridge/broadcom/bcm5785/lpc.c
+++ b/src/southbridge/broadcom/bcm5785/lpc.c
@@ -30,7 +30,7 @@
#include <arch/ioapic.h>
#include "bcm5785.h"
-static void lpc_init(device_t dev)
+static void lpc_init(struct device * dev)
{
/* Initialize the real time clock */
cmos_init(0);
@@ -39,7 +39,7 @@ static void lpc_init(device_t dev)
isa_dma_init();
}
-static void bcm5785_lpc_read_resources(device_t dev)
+static void bcm5785_lpc_read_resources(struct device * dev)
{
struct resource *res;
@@ -70,7 +70,7 @@ static void bcm5785_lpc_read_resources(device_t dev)
*
* @param dev The device whos children's resources are to be enabled.
*/
-static void bcm5785_lpc_enable_childrens_resources(device_t dev)
+static void bcm5785_lpc_enable_childrens_resources(struct device * dev)
{
struct bus *link;
uint32_t reg;
@@ -78,7 +78,7 @@ static void bcm5785_lpc_enable_childrens_resources(device_t dev)
reg = pci_read_config8(dev, 0x44);
for (link = dev->link_list; link; link = link->next) {
- device_t child;
+ struct device * child;
for (child = link->children; child; child = child->sibling) {
if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;
@@ -114,13 +114,13 @@ static void bcm5785_lpc_enable_childrens_resources(device_t dev)
}
-static void bcm5785_lpc_enable_resources(device_t dev)
+static void bcm5785_lpc_enable_resources(struct device * dev)
{
pci_dev_enable_resources(dev);
bcm5785_lpc_enable_childrens_resources(dev);
}
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device * dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x40,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/broadcom/bcm5785/reset.c b/src/southbridge/broadcom/bcm5785/reset.c
index 51ba6ec..e797cee 100644
--- a/src/southbridge/broadcom/bcm5785/reset.c
+++ b/src/southbridge/broadcom/bcm5785/reset.c
@@ -26,9 +26,9 @@
(((DEV) & 0x1F) << 15) | \
(((FN) & 0x7) << 12))
-typedef unsigned device_t;
+typedef unsigned struct device *;
-static void pci_write_config32(device_t dev, unsigned where, unsigned value)
+static void pci_write_config32(struct device * dev, unsigned where, unsigned value)
{
unsigned addr;
addr = (dev>>4) | where;
@@ -36,7 +36,7 @@ static void pci_write_config32(device_t dev, unsigned where, unsigned value)
outl(value, 0xCFC);
}
-static unsigned pci_read_config32(device_t dev, unsigned where)
+static unsigned pci_read_config32(struct device * dev, unsigned where)
{
unsigned addr;
addr = (dev>>4) | where;
diff --git a/src/southbridge/broadcom/bcm5785/sata.c b/src/southbridge/broadcom/bcm5785/sata.c
index 62eab45..ddcb44c 100644
--- a/src/southbridge/broadcom/bcm5785/sata.c
+++ b/src/southbridge/broadcom/bcm5785/sata.c
@@ -73,7 +73,7 @@ static void sata_init(struct device *dev)
}
}
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device * dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x40,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/broadcom/bcm5785/sb_pci_main.c b/src/southbridge/broadcom/bcm5785/sb_pci_main.c
index 3745cef..0e42863 100644
--- a/src/southbridge/broadcom/bcm5785/sb_pci_main.c
+++ b/src/southbridge/broadcom/bcm5785/sb_pci_main.c
@@ -33,7 +33,7 @@
#define NMI_OFF 0
-static void sb_init(device_t dev)
+static void sb_init(struct device * dev)
{
uint8_t byte;
uint8_t byte_old;
@@ -56,7 +56,7 @@ static void sb_init(device_t dev)
}
-static void bcm5785_sb_read_resources(device_t dev)
+static void bcm5785_sb_read_resources(struct device * dev)
{
struct resource *res;
@@ -76,7 +76,7 @@ static void bcm5785_sb_read_resources(device_t dev)
}
-static int lsmbus_recv_byte(device_t dev)
+static int lsmbus_recv_byte(struct device * dev)
{
unsigned device;
struct resource *res;
@@ -90,7 +90,7 @@ static int lsmbus_recv_byte(device_t dev)
return do_smbus_recv_byte(res->base, device);
}
-static int lsmbus_send_byte(device_t dev, uint8_t val)
+static int lsmbus_send_byte(struct device * dev, uint8_t val)
{
unsigned device;
struct resource *res;
@@ -104,7 +104,7 @@ static int lsmbus_send_byte(device_t dev, uint8_t val)
return do_smbus_send_byte(res->base, device, val);
}
-static int lsmbus_read_byte(device_t dev, uint8_t address)
+static int lsmbus_read_byte(struct device * dev, uint8_t address)
{
unsigned device;
struct resource *res;
@@ -118,7 +118,7 @@ static int lsmbus_read_byte(device_t dev, uint8_t address)
return do_smbus_read_byte(res->base, device, address);
}
-static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t val)
+static int lsmbus_write_byte(struct device * dev, uint8_t address, uint8_t val)
{
unsigned device;
struct resource *res;
@@ -139,7 +139,7 @@ static struct smbus_bus_operations lops_smbus_bus = {
.write_byte = lsmbus_write_byte,
};
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device * dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x2c,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/broadcom/bcm5785/usb.c b/src/southbridge/broadcom/bcm5785/usb.c
index cb4a498..b9c2452 100644
--- a/src/southbridge/broadcom/bcm5785/usb.c
+++ b/src/southbridge/broadcom/bcm5785/usb.c
@@ -37,7 +37,7 @@ static void usb_init(struct device *dev)
}
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device * dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x40,
((device & 0xffff) << 16) | (vendor & 0xffff));
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