[coreboot-gerrit] Patch set updated for coreboot: 7d001d0 stout: UNTESTED: use generic sandybridge video init

[Vladimir Serbinenko (phcoder@gmail.com)]

Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6816

-gerrit

commit 7d001d02085f31d40a9401f24146c4d376058453
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Sun Aug 31 21:42:16 2014 +0200

    stout: UNTESTED: use generic sandybridge video init
    
    Change-Id: I695a026b6d6c0d97bbabc09fb369c2e6de142efc
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 3rdparty                                 | 2 +-
 src/mainboard/google/stout/Kconfig       | 5 +++++
 src/mainboard/google/stout/devicetree.cb | 6 ++++++
 3 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/3rdparty b/3rdparty
index f37e0e6..45f0c04 160000
--- a/3rdparty
+++ b/3rdparty
@@ -1 +1 @@
-Subproject commit f37e0e64ac1ac6700a9469f4adc2c391cbd93e43
+Subproject commit 45f0c04fd788fb29d9e303b2b2d1657ddb03448a
diff --git a/src/mainboard/google/stout/Kconfig b/src/mainboard/google/stout/Kconfig
index 79e3c9c..cd12b85 100644
--- a/src/mainboard/google/stout/Kconfig
+++ b/src/mainboard/google/stout/Kconfig
@@ -13,6 +13,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_ACPI_RESUME
 	select HAVE_SMI_HANDLER
 	select MAINBOARD_HAS_CHROMEOS
+	select VGA
+	select INTEL_EDID
+	select MAINBOARD_HAS_NATIVE_VGA_INIT
+	select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
+	select SANDYBRIDGE_LVDS
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb
index 653d3fe..cd74b71 100644
--- a/src/mainboard/google/stout/devicetree.cb
+++ b/src/mainboard/google/stout/devicetree.cb
@@ -10,6 +10,12 @@ chip northbridge/intel/sandybridge
 	register "gpu_panel_power_down_delay" = "150"           # T3: 15ms
 	register "gpu_panel_power_backlight_on_delay" = "2100"  # T5: 210ms
 	register "gpu_panel_power_backlight_off_delay" = "2100" # TD: 210ms
+	register "gfx.use_spread_spectrum_clock" = "1"
+	register "gfx.lvds_dual_channel" = "0"
+	register "gfx.link_frequency_270_mhz" = "1"
+	register "gfx.lvds_num_lanes" = "4"
+	register "gpu_cpu_backlight" = "0x1155"
+	register "gpu_pch_backlight" = "0x06100610"
 
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_rPGA989