[coreboot-gerrit] New patch to review for coreboot: 171618f ipq806x: provide soc specific CBMEM_CONSOLE_PRERAM_BASE
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Wed Apr 1 22:52:25 CEST 2015
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9198
-gerrit
commit 171618f01e37c497c14d4bb0a6d2eb3fd2658276
Author: Vadim Bendebury <vbendeb at chromium.org>
Date: Tue Sep 9 10:52:35 2014 -0700
ipq806x: provide soc specific CBMEM_CONSOLE_PRERAM_BASE
For now storm bootblock runs with DRAM fully initialized, this patch
puts the early console between bootblock and rom phase.
BUG=chrome-os-partner:31734
TEST=verified that preram_cbmem_console is set:
$ grep preram_cbmem_console cbfs/fallback/bootblock.map
40618000 A preram_cbmem_console
Change-Id: I2d63f5fde0d3794062068289c648d8bcda11a9a3
Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
Original-Commit-Id: 6bdadad3787d6a4a2d4828b0f300455fedca2b8d
Original-Change-Id: I132a0cbcc82e713c36fc5031706d9afbf3e9b879
Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/217291
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
src/soc/qualcomm/ipq806x/Kconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index fc78ecc..013d86c 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -55,6 +55,10 @@ config SYS_SDRAM_BASE
hex
default 0x40000000
+config CBMEM_CONSOLE_PRERAM_BASE
+ hex "memory address of the pre-RAM CBMEM console buffer"
+ default 0x40618000
+
config STACK_TOP
hex
default 0x40600000
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