[coreboot-gerrit] Patch merged into coreboot/master: e383feb Broadwell: Synchronize for power management with FRC
gerrit at coreboot.org
gerrit at coreboot.org
Thu Apr 2 17:28:00 CEST 2015
the following patch was just integrated into master:
commit e383feb7c8e1b46639c32df9a11fac6cf3d62403
Author: Kenji Chen <kenji.chen at intel.com>
Date: Fri Sep 26 03:14:57 2014 +0800
Broadwell: Synchronize for power management with FRC
Set Root Port 0 PCI CFG Offset 0xE2[5:4] before ASPM configuration.
BUG=chrome-os-partner:31424
TEST=Build an image, and check the procedure and recommended setting
is applied correctly.
Signed-off-by: Kenji Chen <kenji.chen at intel.com>
Change-Id: I94820787d4ed4a6bf8db8898b7de14467c9d6630
Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
Original-Commit-Id: 24bdea6cd67d5657b94058233cd26130f68c44e4
Original-Change-Id: I98713f615885ac02867942ece2be1cea8ce04ab2
Original-Reviewed-on: https://chromium-review.googlesource.com/219994
Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
Original-Commit-Queue: Kenji Chen <kenji.chen at intel.com>
Original-Tested-by: Kenji Chen <kenji.chen at intel.com>
Reviewed-on: http://review.coreboot.org/9211
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi at google.com>
See http://review.coreboot.org/9211 for details.
-gerrit
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