[coreboot-gerrit] New patch to review for coreboot: 69f9b8a tegra132: Store ODMDATA from BCT into PMC scratch for use by kernel
Aaron Durbin (adurbin@google.com)
gerrit at coreboot.org
Thu Apr 2 23:33:24 CEST 2015
Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9257
-gerrit
commit 69f9b8a3611a501f9ef917188dd8cf001eda2605
Author: Tom Warren <twarren at nvidia.com>
Date: Thu Oct 9 16:01:33 2014 -0700
tegra132: Store ODMDATA from BCT into PMC scratch for use by kernel
In able to do earlyprintk spew on LP0 resume, the kernel needs to
know the board UART. ODMDATA (in bct/odmdata.cfg) contains this info,
and the kernel looks for it in PMC_SCRATCH20. Fetch the ODMDATA word
from the BCT copy stored in IRAM by the BootROM.
BUG=chrome-os-partner:32015
BRANCH=none
TEST=Built for Rush and Ryu OK. Dumped PMC_SCRATCH20 in TegraShell
on Rush and confirmed value is what's in odmdata.cfg.
Original-Change-Id: I63f33558ee8b00bd6c1e313efcd531e1d5fc67eb
Original-Signed-off-by: Tom Warren <twarren at nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/222402
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
(cherry picked from commit 3f6a21afdb81f7d2ae90119c563535b4c87c9ade)
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
Change-Id: I9819ffdf0f7618f0dd8dc50f81b5b26d6f94bfbd
---
src/soc/nvidia/tegra132/bootblock.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/src/soc/nvidia/tegra132/bootblock.c b/src/soc/nvidia/tegra132/bootblock.c
index 6481eb3..6f25050 100644
--- a/src/soc/nvidia/tegra132/bootblock.c
+++ b/src/soc/nvidia/tegra132/bootblock.c
@@ -29,6 +29,29 @@
#include "power.h"
+#define BCT_OFFSET_IN_BIT 0x50
+#define ODMDATA_OFFSET_IN_BCT 0x6A8
+#define TEGRA_SRAM_MAX (TEGRA_SRAM_BASE + TEGRA_SRAM_SIZE)
+
+static void save_odmdata(void)
+{
+ struct tegra_pmc_regs *pmc = (struct tegra_pmc_regs*)TEGRA_PMC_BASE;
+ uintptr_t bct_offset;
+ u32 odmdata;
+
+ // pmc.odmdata: [18:19]: console type, [15:17]: UART id.
+ // TODO(twarren) ODMDATA is stored in the BCT, from bct/odmdata.cfg.
+ // I use the BCT offset in the BIT in SRAM to locate the BCT, and
+ // pick up the ODMDATA word at BCT offset 0x6A8. I could use a BCT
+ // struct header from cbootimage, but it seems like overkill for this.
+
+ bct_offset = read32((void *)(TEGRA_SRAM_BASE + BCT_OFFSET_IN_BIT));
+ if (bct_offset > TEGRA_SRAM_BASE && bct_offset < TEGRA_SRAM_MAX) {
+ odmdata = read32((void *)(bct_offset + ODMDATA_OFFSET_IN_BCT));
+ write32(odmdata, &pmc->odmdata);
+ }
+}
+
void __attribute__((weak)) bootblock_mainboard_early_init(void)
{
/* Empty default implementation. */
@@ -52,6 +75,9 @@ void main(void)
CLK_H_APBDMA,
0, CLK_V_MSELECT, 0, 0);
+ /* Find ODMDATA in IRAM and save it to scratch reg */
+ save_odmdata();
+
bootblock_mainboard_early_init();
if (CONFIG_BOOTBLOCK_CONSOLE) {
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