[coreboot-gerrit] Patch merged into coreboot/master: 94fea49 Broadwell: Fix PCIe L1 Sub-State capability ID not filled.
gerrit at coreboot.org
gerrit at coreboot.org
Sat Apr 4 12:40:14 CEST 2015
the following patch was just integrated into master:
commit 94fea491df7beaf02b2cd01d3b4366e9baa82a89
Author: Kenji Chen <kenji.chen at intel.com>
Date: Tue Sep 30 14:17:35 2014 +0800
Broadwell: Fix PCIe L1 Sub-State capability ID not filled.
Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
Original-Commit-Id: 31d7276fbdca67937bcdf0d5c2af371a2fd1a510
Original-BUG=chrome-os-partner:31424,chromeos-os-partner:32380
Original-TEST=Build a BIOS image and check the value is applied correctly.
Original-Signed-off-by: Kenji Chen <kenji.chen at intel.com>
Original-Change-Id: I0adda3643776b259a635a021babd983090f1df43
Original-Reviewed-on: https://chromium-review.googlesource.com/220475
Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
Change-Id: Id88c11ed128b44c3a60ef1a141b99071c1ee15d3
Reviewed-on: http://review.coreboot.org/9267
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi at google.com>
See http://review.coreboot.org/9267 for details.
-gerrit
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