[coreboot-gerrit] Patch merged into coreboot/master: fe51cc4 pistachio: modify memory layout
gerrit at coreboot.org
gerrit at coreboot.org
Thu Apr 9 02:31:36 CEST 2015
the following patch was just integrated into master:
commit fe51cc4a8dc03f876a48c3014a2e20fe02bca9a3
Author: Vadim Bendebury <vbendeb at chromium.org>
Date: Tue Nov 11 20:14:47 2014 -0800
pistachio: modify memory layout
With the code now running on the FPGA board it makes sense to correct
the memory layout definitions to match the actual hardware.
Note that the latest FPGA board firmware introduced support of the
additional 128KB of SRAM (called GRAM) at base address of 0x9a000000.
These are still interim values, which will be tweaked when the actual
bring up board is available.
BRANCH=none
BUG=chrome-os-partner:31438
TEST=the code put into SPI NOR flash boots all the way to ramstage.
Change-Id: I00aa5bc3aabba50df2187bb208cf2fcd11b26b3d
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: a6378be5cd304744b40c57a34d7a276233d45779
Original-Change-Id: I50183c2d5f9017801d5c8a7a7addf08efa492b35
Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/229203
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: http://review.coreboot.org/9337
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi at google.com>
See http://review.coreboot.org/9337 for details.
-gerrit
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