[coreboot-gerrit] Patch set updated for coreboot: 3bc9d52 broadwell: add ROM stage pre console init call back
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Fri Apr 10 03:25:40 CEST 2015
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9472
-gerrit
commit 3bc9d52c4604a6741a23f60a347782168b64d98f
Author: Wenkai Du <wenkai.du at intel.com>
Date: Wed Nov 5 21:10:57 2014 -0800
broadwell: add ROM stage pre console init call back
Serial port on ITE 8772 SuperIO must be initialized before
console_init is called. So the pre console init callback
is added to let mainboard code do proper initialization.
Change-Id: Iaa3e4b9c6e7ce77a7b9a6b9ecedd8ea54f3141dc
Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
Original-Commit-Id: 71ee2fd470e19fa4854f895678445b05c17761c1
Original-Change-Id: I594e6e4a72f65744deca5cad666eb3b227adeb24
Original-Signed-off-by: Wenkai Du <wenkai.du at intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/227933
Original-Reviewed-by: Kenji Chen <kenji.chen at intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
Original-Reviewed-by: Rajmohan Mani <rajmohan.mani at intel.com>
Original-Reviewed-by: Shawn Nematbakhsh <shawnn at chromium.org>
---
src/soc/intel/broadwell/include/soc/romstage.h | 1 +
src/soc/intel/broadwell/romstage/romstage.c | 6 ++++++
2 files changed, 7 insertions(+)
diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h
index 946d1d0..b636223 100644
--- a/src/soc/intel/broadwell/include/soc/romstage.h
+++ b/src/soc/intel/broadwell/include/soc/romstage.h
@@ -57,4 +57,5 @@ int smbus_read_byte(unsigned device, unsigned address);
int early_spi_read(u32 offset, u32 size, u8 *buffer);
int early_spi_read_wpsr(u8 *sr);
+void mainboard_pre_console_init(void);
#endif
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 31d4f88..11e14d7 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -61,6 +61,10 @@ void * asmlinkage romstage_main(unsigned long bist,
/* PCH Early Initialization */
pch_early_init();
+ /* Call into mainboard pre console init. Needed to enable serial port
+ on IT8772 */
+ mainboard_pre_console_init();
+
/* Start console drivers */
console_init();
@@ -149,4 +153,6 @@ int vboot_get_sw_write_protect(void)
/* Return unprotected status if status read fails. */
return (early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80));
}
+
+void __attribute__((weak)) mainboard_pre_console_init(void) {}
#endif
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