[coreboot-gerrit] Patch merged into coreboot/master: 4772295 arch: armv7: Fix cache sync instructions.
gerrit at coreboot.org
gerrit at coreboot.org
Mon Apr 13 12:19:13 CEST 2015
the following patch was just integrated into master:
commit 47722957a107ebb17278663bdfd8e5f1f3e5d42b
Author: Deepa Dinamani <deepad at codeaurora.org>
Date: Wed Dec 17 13:40:43 2014 -0800
arch: armv7: Fix cache sync instructions.
When the i-cache is on and the d-cache is off, the L1 i-cache is still
fetching information through L2 cache.
Since L2 cache is never invalidated, it has stale information.
BRANCH=storm
BUG=none
TEST=Resolves the invalidate data fetch from i-cache while jumping from
bootblock to romstage.
Change-Id: Ibaca1219be2e40ce5bbbd1c124863d0ea71d0466
Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
Original-Commit-Id: a13e20f9b242d8193dcb314a2bdc708c6bdfea51
Original-Change-Id: I252682d372bd505f525f075461b327e4bcf70a1a
Original-Signed-off-by: Deepa Dinamani <deepad at codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/236422
Original-Reviewed-by: Trevor Bourget <tbourget at codeaurora.org>
Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
Original-Reviewed-by: Vadim Bendebury <vbendeb at chromium.org>
Original-Commit-Queue: Vadim Bendebury <vbendeb at chromium.org>
Reviewed-on: http://review.coreboot.org/9587
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi at google.com>
See http://review.coreboot.org/9587 for details.
-gerrit
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