[coreboot-gerrit] New patch to review for coreboot: skylake: remove IedSize from chip.h

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11201

-gerrit

commit c91f86edc86ea78f0531c4599a9833143e022f5c
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Aug 5 17:38:14 2015 -0500

    skylake: remove IedSize from chip.h
    
    IedSize is not used in replace of IED_REGION_SIZE.
    Drop it from chip.h.
    
    BUG=chrome-os-partner:43636
    BRANCH=None
    TEST=Built, booted, suspended, resumed on glados.
    
    Original-Change-Id: I38f6518701306c0ffc6d2b2e3fe01624a5eadf54
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/290933
    Original-Reviewed-by: Leroy P Leahy <leroy.p.leahy at intel.com>
    Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Trybot-Ready: David James <davidjames at chromium.org>
    
    Change-Id: I9dd9e689d4d4f7b4770369dcd042d3325990ae32
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/intel/skylake/chip.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index c04e9f8..96389a9 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -132,7 +132,6 @@ struct soc_intel_skylake_config {
 	u64 PlatformMemorySize;
 	u8 SmramMask;
 	u8 MrcFastBoot;
-	u32 IedSize;
 	u32 TsegSize;
 	u16 MmioSize;