[coreboot-gerrit] New patch to review for coreboot: Don't select serirq_continuous_mode when it doesn't exist

[Martin Roth (martinroth@google.com)]

Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11340

-gerrit

commit 8d39d163616f923b4700f1f136dc55f16a4d2c2b
Author: Martin Roth <martinroth at google.com>
Date:   Tue Aug 25 14:41:33 2015 -0600

    Don't select serirq_continuous_mode when it doesn't exist
    
    Bay Trail and Braswell don't use SERIRQ_CONTINUOUS_MODE, which
    Google's Chrome EC selects.  By adding a flag saying that the
    Kconfig symbol isn't used on these platforms, this can be avoided.
    
    Change-Id: I1107e1e58dbc4fb7fd068e4a253c25fb2b145b5f
    Signed-off-by: Martin Roth <martinroth at google.com>
---
 src/ec/google/chromeec/Kconfig | 2 +-
 src/soc/intel/baytrail/Kconfig | 6 ++++++
 src/soc/intel/braswell/Kconfig | 6 ++++++
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig
index 25cc0e4..9c778e2 100644
--- a/src/ec/google/chromeec/Kconfig
+++ b/src/ec/google/chromeec/Kconfig
@@ -37,7 +37,7 @@ config EC_GOOGLE_CHROMEEC_I2C_PROTO3
 config EC_GOOGLE_CHROMEEC_LPC
 	depends on EC_GOOGLE_CHROMEEC && ARCH_X86  # Needs Plug-and-play.
 	def_bool y
-	select SERIRQ_CONTINUOUS_MODE
+	select SERIRQ_CONTINUOUS_MODE if !NO_LPC_SERIRQ_CONTINUOUS_MODE
 	help
 	  Google Chrome EC via LPC bus.
 
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 5754c15..28676db 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -171,4 +171,10 @@ config REFCODE_BLOB_FILE
 
 endif # HAVE_REFCODE_BLOB
 
+config NO_LPC_SERIRQ_CONTINUOUS_MODE
+	def_bool y
+	help
+	  Baytrail doesn't use SERIRQ_CONTINUOUS_MODE.  This flag tells
+	  Google's Chrome EC not to try to set it.
+
 endif
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 4f7ed6a..edbbf85 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -211,4 +211,10 @@ config ME_BIN_PATH
 	depends on HAVE_ME_BIN
 	default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/me.bin"
 
+config NO_LPC_SERIRQ_CONTINUOUS_MODE
+	def_bool y
+	help
+	  Braswell doesn't use SERIRQ_CONTINUOUS_MODE.  This flag tells
+	  Google's Chrome EC not to try to set it.
+
 endif