[coreboot-gerrit] Patch set updated for coreboot: pci_device: Fix IRQ swizzling for pci2pci bridges
Michael Tasche (michael.tasche@esd.eu)
gerrit at coreboot.org
Tue Dec 1 17:40:12 CET 2015
Michael Tasche (michael.tasche at esd.eu) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12579
-gerrit
commit d384001bdde82ef1b3398d4b27c8eb1df16e33fb
Author: Michael Tasche <michael.tasche at esd.eu>
Date: Tue Dec 1 13:54:23 2015 +0100
pci_device: Fix IRQ swizzling for pci2pci bridges
On ATOM E38xx we have 4 PCIe lanes seen as one
multifunction device with function 0-3.
The swizzling was correct for lane 0(function 0) only.
Change-Id: I669b7f5244a7f8cc23df5e9020f26510e778c64d
Signed-off-by: Michael Tasche <michael.tasche at esd.eu>
---
src/device/pci_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 5123229..3f799a8 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -1340,7 +1340,7 @@ static int swizzle_irq_pins(device_t dev, device_t *parent_bridge)
child_devfn = child->path.pci.devfn;
/* Swizzle the INT_PIN for any bridges not on root bus */
- swizzled_pin = (PCI_SLOT(child_devfn) + swizzled_pin) % 4;
+ swizzled_pin = (PCI_SLOT(child_devfn) + PCI_FUNC(parent_devfn) + swizzled_pin) % 4;
printk(BIOS_SPEW, "\tWith INT_PIN swizzled to %s\n"
"\tAttached to bridge device %01X:%02Xh.%02Xh\n",
pin_to_str(swizzled_pin + 1), parent_bus,
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