[coreboot-gerrit] New patch to review for coreboot: intel/minnowmax: Fix IRQ connection for legacy uart at 0x3f8

[Michael Tasche (michael.tasche@esd.eu)]

Michael Tasche (michael.tasche at esd.eu) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12622

-gerrit

commit 079d8ea1f17ccd5921da5027e12afdf0ef656a88
Author: Michael Tasche <michael.tasche at esd.eu>
Date:   Wed Dec 2 17:34:47 2015 +0100

    intel/minnowmax: Fix IRQ connection for legacy uart at 0x3f8
    
    The E38xx legacy uart fires IRQ4, not IRQ3.
    PCI based IRQ A is switched from IRQ4 to IRQ3,
    to get a working IRQ for the legacy uart.
    
    Change-Id: Ibc8e824c92bf1b9a92594ddc5d8a06726c9f1744
    Signed-off-by: Michael Tasche <michael.tasche at esd.eu>
---
 src/mainboard/intel/minnowmax/irqroute.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mainboard/intel/minnowmax/irqroute.h b/src/mainboard/intel/minnowmax/irqroute.h
index bdf3d94..f866069 100644
--- a/src/mainboard/intel/minnowmax/irqroute.h
+++ b/src/mainboard/intel/minnowmax/irqroute.h
@@ -70,7 +70,7 @@
  * Floppy: 6
  */
 #define PIRQ_PIC_ROUTES \
-	PIRQ_PIC(A,  4), \
+	PIRQ_PIC(A,  3), \
 	PIRQ_PIC(B,  5), \
 	PIRQ_PIC(C,  7), \
 	PIRQ_PIC(D, 10), \