[coreboot-gerrit] Patch merged into coreboot/master: southbridge/amd/sr5650: Add MCFG ACPI table support
gerrit at coreboot.org
gerrit at coreboot.org
Fri Dec 18 19:51:47 CET 2015
the following patch was just integrated into master:
commit 1eaaa0e446b88e0ad60c4b6f68a022a9184f1df8
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date: Fri Aug 14 15:20:42 2015 -0500
southbridge/amd/sr5650: Add MCFG ACPI table support
As the southbridge largely controls the PCI[e] configuration space
this patch moves the resource allocation from the northbridge
to the southbridge when the extended configuration space region
is enabled.
Change-Id: I0c4ba74ddcc727cd92b848d5d3240e6f9f392101
Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12050
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth at google.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply at raptorengineeringinc.com>
See https://review.coreboot.org/12050 for details.
-gerrit
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