[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/broadwell: Add back support for EHCI debug setup
gerrit at coreboot.org
gerrit at coreboot.org
Sun Dec 27 17:45:12 CET 2015
the following patch was just integrated into master:
commit 8d2b49f1f71a88aad29f3a5d919156e6b7f3b103
Author: Duncan Laurie <dlaurie at google.com>
Date: Tue Dec 22 17:15:29 2015 -0800
soc/intel/broadwell: Add back support for EHCI debug setup
The EHCI debug device setup code was removed from broadwell in
commit 49ee5ef: http://review.coreboot.org/11874
However the generic device setup code is in the southbridge/common/intel
directory while broadwell is in the soc directory so this is not used.
Add it back to the broadwell soc to fix undefined reference compile
errors with 'pci_ehci_dbg_dev' and 'pci_ehci_dbg_enable'.
This was tested to compile and produce romstage and ramstage output on a
google/samus board.
Change-Id: Ia93825a1e21a770f6c82d0989cb97980a5c700d6
Signed-off-by: Duncan Laurie <dlaurie at google.com>
Reviewed-on: https://review.coreboot.org/12794
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
See https://review.coreboot.org/12794 for details.
-gerrit
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