[coreboot-gerrit] New patch to review for coreboot: 4d1d19f mainboards/asus/kfsn4-dre: Run BSP FIDVID before AP FIDVID
Timothy Pearson (tpearson@raptorengineeringinc.com)
gerrit at coreboot.org
Tue Feb 10 07:40:59 CET 2015
Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8397
-gerrit
commit 4d1d19ffab984e77a984b06c51e17e379b888743
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date: Tue Feb 10 00:37:21 2015 -0600
mainboards/asus/kfsn4-dre: Run BSP FIDVID before AP FIDVID
This resolves an issue on Shanghai dual CPU configurations where
the APs on node 0 would not start. Single CPU configurations are
unaffected by this issue.
TEST: Booted KFSN4-DRE with dual Opteron 8389 CPUs and verified
proper BSP/AP start and microcode patch levels.
Change-Id: I0f5d4e0e356c6bd64e324b4399ef43b400ecab0c
Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
src/mainboard/asus/kfsn4-dre/romstage.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c
index cd8b9de..0dab8e8 100644
--- a/src/mainboard/asus/kfsn4-dre/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre/romstage.c
@@ -271,19 +271,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
*/
wait_all_core0_started();
- if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) {
- /* Core0 on each node is configured. Now setup any additional cores. */
- printk(BIOS_DEBUG, "start_other_cores()\n");
- start_other_cores();
- post_code(0x37);
- wait_all_other_cores_started(bsp_apicid);
- }
-
- printk(BIOS_DEBUG, "set_ck804_base_unit_id()\n");
- ck804_control(ctrl_conf_fix_pci_numbering, ARRAY_SIZE(ctrl_conf_fix_pci_numbering), CK804_BOARD_BOOT_BASE_UNIT_UID);
-
- post_code(0x38);
-
if (IS_ENABLED(CONFIG_SET_FIDVID)) {
msr = rdmsr(0xc0010071);
printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo);
@@ -303,6 +290,19 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo);
}
+ if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) {
+ /* Core0 on each node is configured. Now setup any additional cores. */
+ printk(BIOS_DEBUG, "start_other_cores()\n");
+ start_other_cores();
+ post_code(0x37);
+ wait_all_other_cores_started(bsp_apicid);
+ }
+
+ printk(BIOS_DEBUG, "set_ck804_base_unit_id()\n");
+ ck804_control(ctrl_conf_fix_pci_numbering, ARRAY_SIZE(ctrl_conf_fix_pci_numbering), CK804_BOARD_BOOT_BASE_UNIT_UID);
+
+ post_code(0x38);
+
init_timer(); // Need to use TMICT to synconize FID/VID
wants_reset = ck804_early_setup_x();
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