[coreboot-gerrit] New patch to review for coreboot: ce9e6ea tegra132: Add BCT support in tegra132 soc
Marc Jones (marc.jones@se-eng.com)
gerrit at coreboot.org
Wed Feb 11 00:32:27 CET 2015
Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8413
-gerrit
commit ce9e6ea815fe560ddaf30f734b3bcf028ec7da8e
Author: Furquan Shaikh <furquan at google.com>
Date: Mon Jun 9 13:26:38 2014 -0700
tegra132: Add BCT support in tegra132 soc
Builds with cbootimage.
BUG=None
BRANCH=None
TEST=build test
Original-Change-Id: I796f171031bacf17106878d4a554e8f1cbfe93f8
Original-Signed-off-by: Furquan Shaikh <furquan at google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/203145
Original-Tested-by: Furquan Shaikh <furquan at chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Original-Commit-Queue: Aaron Durbin <adurbin at chromium.org>
(cherry picked from commit 4778ae4d08a25306407f0fd2fe47976d63463f9d)
Increase the bootblock area for the larger BCT that is generated by
the coreboot version of the cbootimage tool.
Change-Id: I42b8208504bf4936a9fa14f820d665590f6a3754
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
---
src/soc/nvidia/tegra132/Kconfig | 4 ++--
src/soc/nvidia/tegra132/Makefile.inc | 29 +++++++++++++++++++++++++++++
2 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index f11e60f..d90b8aa 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -16,10 +16,10 @@ config BOOTBLOCK_ROM_OFFSET
config CBFS_HEADER_ROM_OFFSET
hex "offset of master CBFS header in ROM"
- default 0x18000
+ default 0x40000
config CBFS_ROM_OFFSET
hex "offset of CBFS data in ROM"
- default 0x18080
+ default 0x40080
endif
diff --git a/src/soc/nvidia/tegra132/Makefile.inc b/src/soc/nvidia/tegra132/Makefile.inc
index e31bbb6..f39dcb1 100644
--- a/src/soc/nvidia/tegra132/Makefile.inc
+++ b/src/soc/nvidia/tegra132/Makefile.inc
@@ -10,3 +10,32 @@ ramstage-y += cbmem.c
ramstage-y += timer.c
CPPFLAGS_common += -Isrc/soc/nvidia/tegra132/include/
+
+# We want to grab the bootblock right before it goes into the image and wrap
+# it inside a BCT, but ideally we would do that without making special, one
+# use modifications to the main ARM Makefile. We do this in two ways. First,
+# we copy bootblock.elf to bootblock.raw.elf and allow the %.bin: %.elf
+# template rule to turn it into bootblock.raw.bin. This makes sure whatever
+# processing is supposed to happen to turn an .elf into a .bin happens.
+#
+# Second, we add our own rule for creating bootblock.bin from
+# bootblock.raw.bin which displaces the template rule. When other rules that
+# package up the image pull in bootblock.bin, it will be this wrapped version
+# instead of the raw bootblock.
+
+$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
+ cp $< $@
+
+$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg
+ @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
+ $(CBOOTIMAGE) -gbct --soc tegra132 $< $@
+
+BCT_BIN = $(obj)/generated/bct.bin
+BCT_WRAPPER = $(obj)/generated/bct.wrapper
+$(objcbfs)/bootblock.bin: $(CBOOTIMAGE) $(objcbfs)/bootblock.raw.bin $(BCT_BIN)
+ echo "Version = 1;" > $(BCT_WRAPPER)
+ echo "Redundancy = 1;" >> $(BCT_WRAPPER)
+ echo "Bctfile = $(BCT_BIN);" >> $(BCT_WRAPPER)
+ echo "BootLoader = $<,$(CONFIG_BOOTBLOCK_BASE),$(CONFIG_BOOTBLOCK_BASE),Complete;" >> $(BCT_WRAPPER)
+ @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
+ $(CBOOTIMAGE) $(BCT_WRAPPER) $@
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