[coreboot-gerrit] Patch merged into coreboot/master: 0b87bb7 AMD cimx/sb800: Disconnect PCI bridge 0:14.4 from pins
gerrit at coreboot.org
gerrit at coreboot.org
Mon Feb 23 21:33:59 CET 2015
the following patch was just integrated into master:
commit 0b87bb77261fc106d6473eba25202d719fd7b13d
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Tue Nov 11 17:22:23 2014 +0200
AMD cimx/sb800: Disconnect PCI bridge 0:14.4 from pins
Some GPIO pins are shared with PCI bridge 0:14.4.
As our PCI subsystem currently does not configure PCI bridges that are
marked disabled, but remain visible in the hardware, simply setting 0:14.4
disabled in the devicetree does not work here yet.
Change-Id: Ib9652e12a888e1d797d879d97737ba4101b7029a
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
Reviewed-on: http://review.coreboot.org/8495
Reviewed-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Reviewed-by: Nicolas Reinecke <nr at das-labor.org>
Tested-by: build bot (Jenkins)
See http://review.coreboot.org/8495 for details.
-gerrit
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