[coreboot-gerrit] Patch merged into coreboot/master: 7809356 pcengines/apu1: Implement board GPIOs
gerrit at coreboot.org
gerrit at coreboot.org
Mon Feb 23 21:34:58 CET 2015
the following patch was just integrated into master:
commit 780935687d74f89a25a9c58952314be6af61c348
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Tue Nov 11 17:22:23 2014 +0200
pcengines/apu1: Implement board GPIOs
Some GPIO pins are shared with (disabled) PCI bridge 0:14.4.
As our PCI subsystem currently does not configure PCI bridges that are
marked disabled, but remain visible in the hardware, we cannot mark 0:14.4
disabled in devicetree just yet.
Change-Id: Ibc5d950662d633a07d62fd5a5984a56d8e5f959d
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
Reviewed-on: http://review.coreboot.org/8326
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
See http://review.coreboot.org/8326 for details.
-gerrit
More information about the coreboot-gerrit
mailing list