[coreboot-gerrit] New patch to review for coreboot: c9e3928 Intel ibexpeak: Fix SATA configuration

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8523

-gerrit

commit c9e3928f4c5ba69e2203db18a8603fbfb07c3ca0
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Tue Feb 24 11:53:06 2015 +0200

    Intel ibexpeak: Fix SATA configuration
    
    It got broken with commit bde6d309.
    
    Change-Id: I0d7180b1659da45bf87d4de46b7b387cbc73cd0e
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/southbridge/intel/ibexpeak/sata.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c
index c8450ad..6dc0a7e 100644
--- a/src/southbridge/intel/ibexpeak/sata.c
+++ b/src/southbridge/intel/ibexpeak/sata.c
@@ -67,7 +67,7 @@ static void sata_init(struct device *dev)
 
 	if (sata_mode == 0) {
 		/* AHCI */
-		u32 *abar;
+		u8 *abar;
 
 		printk(BIOS_DEBUG, "SATA: Controller in AHCI mode.\n");
 
@@ -103,7 +103,7 @@ static void sata_init(struct device *dev)
 		pci_write_config32(dev, 0x98, 0x00590200);
 
 		/* Initialize AHCI memory-mapped space */
-		abar = (u32 *)pci_read_config32(dev, PCI_BASE_ADDRESS_5);
+		abar = (u8 *)pci_read_config32(dev, PCI_BASE_ADDRESS_5);
 		printk(BIOS_DEBUG, "ABAR: %p\n", abar);
 		/* CAP (HBA Capabilities) : enable power management */
 		reg32 = read32(abar + 0x00);
@@ -117,7 +117,7 @@ static void sata_init(struct device *dev)
 		}
 		write32(abar + 0x00, reg32);
 		/* PI (Ports implemented) */
-		write32(abar + 0x0c, config->sata_port_map);
+		write32(abar + 0x03, config->sata_port_map);
 		(void)read32(abar + 0x03);	/* Read back 1 */
 		(void)read32(abar + 0x03);	/* Read back 2 */
 		/* CAP2 (HBA Capabilities Extended) */