[coreboot-gerrit] Patch set updated for coreboot: 20654ae northbridge/amd/amdmct: Honor MMCONF_BASE_ADDRESS
Timothy Pearson (tpearson@raptorengineeringinc.com)
gerrit at coreboot.org
Thu Jun 4 22:13:37 CEST 2015
Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10427
-gerrit
commit 20654ae0b167a411b2fb1b715e8c7cd2098dba17
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date: Thu Jun 4 13:34:23 2015 -0500
northbridge/amd/amdmct: Honor MMCONF_BASE_ADDRESS
The MMIO hole start address was hardcoded on AMD Family 10h
systems. Use the MMCONF_BASE_ADDRESS Kconfig setting instead.
Change-Id: I204e904d96d14e99529fa5e524fd73e6ea256dc0
Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
src/northbridge/amd/amdmct/wrappers/mcti_d.c | 26 ++++++++++++++++++--------
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
index 1706fce..ea32893 100644
--- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c
+++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
@@ -31,6 +31,18 @@
#define NVRAM_DDR3_1066 2
#define NVRAM_DDR3_800 3
+/* The recommended maximum GFX Upper Memory Area
+ * size is 256M, however, to be on the safe side
+ * move TOM down by 512M.
+ */
+#define MAXIMUM_GFXUMA_SIZE 0x20000000
+
+/* Do not allow less than 16M of DRAM in 32-bit space.
+ * This number is not hardware constrained and can be
+ * changed as needed.
+ */
+#define MINIMUM_DRAM_BELOW_4G 0x1000000
+
static const uint16_t ddr2_limits[4] = {400, 333, 266, 200};
static const uint16_t ddr3_limits[4] = {800, 666, 533, 400};
@@ -159,17 +171,15 @@ static u16 mctGet_NVbits(u8 index)
//val = 1; /* enable */
break;
case NV_BottomIO:
-#if !CONFIG_GFXUMA
- val = 0xE0; /* address bits [31:24] */
-#elif CONFIG_GFXUMA
- val = 0xC0; /* address bits [31:24] */
-#endif
- break;
case NV_BottomUMA:
+ /* address bits [31:24] */
#if !CONFIG_GFXUMA
- val = 0xE0; /* address bits [31:24] */
+ val = (CONFIG_MMCONF_BASE_ADDRESS >> 24);
#elif CONFIG_GFXUMA
- val = 0xC0; /* address bits [31:24] */
+ #if (CONFIG_MMCONF_BASE_ADDRESS < (MAXIMUM_GFXUMA_SIZE + MINIMUM_DRAM_BELOW_4G))
+ #error "MMCONF_BASE_ADDRESS is too small"
+ #endif
+ val = ((CONFIG_MMCONF_BASE_ADDRESS - MAXIMUM_GFXUMA_SIZE) >> 24);
#endif
break;
case NV_ECC:
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