[coreboot-gerrit] New patch to review for coreboot: ce38029 mips: implement arch_segment_loaded callback
Ionela Voinescu (ionela.voinescu@imgtec.com)
gerrit at coreboot.org
Sun Jun 7 22:13:24 CEST 2015
Ionela Voinescu (ionela.voinescu at imgtec.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10456
-gerrit
commit ce38029c7a0d2c445a510751435e03e0b9ca21fb
Author: Ionela Voinescu <ionela.voinescu at imgtec.com>
Date: Wed May 20 17:03:23 2015 +0100
mips: implement arch_segment_loaded callback
This change adds cache management after loading stages.
Before jumping to a new stage we should flush the data
caches to memory and invalidate instruction cache.
Also, the unnecessary inclusion of symbols.h was removed.
With this change all stages of Coreboot are now executed
successfully.
Change-Id: I86e07432c21a803ef1cfc41b633c5df42b99de90
Signed-off-by: Ionela Voinescu <ionela.voinescu at imgtec.com>
---
src/arch/mips/cache.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/arch/mips/cache.c b/src/arch/mips/cache.c
index 7d96426..297f14d 100644
--- a/src/arch/mips/cache.c
+++ b/src/arch/mips/cache.c
@@ -20,7 +20,7 @@
#include <arch/cache.h>
#include <arch/cpu.h>
#include <console/console.h>
-#include <symbols.h>
+#include <program_loading.h>
/* cache_op: issues cache operation for specified address */
#define cache_op(op, addr) \
@@ -109,3 +109,8 @@ void cache_invalidate_all(uintptr_t start, size_t size)
perform_cache_operation(start, size, CACHE_CODE(DCACHE, WB_INVD));
perform_cache_operation(start, size, CACHE_CODE(L2CACHE, WB_INVD));
}
+
+void arch_segment_loaded(uintptr_t start, size_t size, int flags)
+{
+ cache_invalidate_all(start, size);
+}
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