[coreboot-gerrit] Patch set updated for coreboot: southbridge/amd/sb700: Add option for last power state after failure
Timothy Pearson (tpearson@raptorengineeringinc.com)
gerrit at coreboot.org
Sat Oct 24 22:55:25 CEST 2015
Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12175
-gerrit
commit 4ed28775106362675753a8ba50b9c07f8e9022e2
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date: Fri Oct 23 22:16:55 2015 -0500
southbridge/amd/sb700: Add option for last power state after failure
Change-Id: Ieb27bd51dfd45dd15d24a576865d38180a07444e
Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
src/southbridge/amd/sb700/sm.c | 31 ++++++++++++++++++++++++-------
1 file changed, 24 insertions(+), 7 deletions(-)
diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c
index 16958a2..c33ffb0 100644
--- a/src/southbridge/amd/sb700/sm.c
+++ b/src/southbridge/amd/sb700/sm.c
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Advanced Micro Devices, Inc.
+ * Copyright (C) 2015 Timothy Pearson <tpearson at raptorengineeringinc.com>, Raptor Engineering
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -45,6 +46,20 @@
uint8_t amd_sb700_aux_smbus = 0;
+enum power_mode {
+ POWER_MODE_OFF = 0,
+ POWER_MODE_ON = 1,
+ POWER_MODE_LAST = 2,
+ POWER_MODE_UNKNOWN = 3
+};
+
+static const char* power_mode_names[] = {
+ [POWER_MODE_OFF] = "off",
+ [POWER_MODE_ON] = "on",
+ [POWER_MODE_LAST] = "last",
+ [POWER_MODE_UNKNOWN] = "unknown",
+};
+
/*
* SB700 enables all USB controllers by default in SMBUS Control.
* SB700 enables SATA by default in SMBUS Control.
@@ -56,7 +71,7 @@ static void sm_init(device_t dev)
u8 rev;
u32 dword;
void *ioapic_base;
- u32 on;
+ uint32_t power_state;
u32 nmi_option;
printk(BIOS_INFO, "sm_init().\n");
@@ -128,16 +143,18 @@ static void sm_init(device_t dev)
pm_iowrite(0x53, byte);
/* power after power fail */
- on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
- get_option(&on, "power_on_after_fail");
+ power_state = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
+ get_option(&power_state, "power_on_after_fail");
+ power_state &= 0x3;
byte = pm_ioread(0x74);
byte &= ~0x03;
- if (on) {
- byte |= 2;
- }
+ if (power_state == POWER_MODE_ON)
+ byte |= 0x1;
+ else if (power_state == POWER_MODE_LAST)
+ byte |= 0x2;
byte |= 1 << 2;
pm_iowrite(0x74, byte);
- printk(BIOS_INFO, "set power %s after power fail\n", on ? "on" : "off");
+ printk(BIOS_INFO, "set power \"%s\" after power fail\n", power_mode_names[power_state]);
byte = pm_ioread(0x68);
byte &= ~(1 << 1);
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