[coreboot-gerrit] Patch set updated for coreboot: Revert "AMD OemS3Save: refactor for Merlin Falcon"
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Sat Oct 31 17:44:30 CET 2015
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12282
-gerrit
commit 93f67a71e5a618100c8e989a93085caa1c45486c
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Sat Oct 31 18:06:52 2015 +0200
Revert "AMD OemS3Save: refactor for Merlin Falcon"
This reverts commit d3deecdd9c5c0a8031f2ea9d6c90e0997f123d93.
Do not mix open-source AGESA and binary PI trees. Once you have
working S3 support for binaryPI platforms, add the adapted
oem_s3.c file as northbridge/amd/pi/oem_s3.c instead.
Change-Id: I7c981d0023a5c0225e046f9c0104acfa07436b79
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/northbridge/amd/agesa/agesawrapper.h | 2 +-
src/northbridge/amd/agesa/oem_s3.c | 8 +-------
2 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/src/northbridge/amd/agesa/agesawrapper.h b/src/northbridge/amd/agesa/agesawrapper.h
index 7e58e79..eb1a59c 100644
--- a/src/northbridge/amd/agesa/agesawrapper.h
+++ b/src/northbridge/amd/agesa/agesawrapper.h
@@ -74,6 +74,6 @@ extern const struct OEM_HOOK OemCustomize;
/* For suspend-to-ram support. */
AGESA_STATUS OemInitResume(AMD_RESUME_PARAMS *ResumeParams);
AGESA_STATUS OemS3LateRestore(AMD_S3LATE_PARAMS *S3LateParams);
-AGESA_STATUS OemS3Save(void *vS3SaveParams);
+AGESA_STATUS OemS3Save(AMD_S3SAVE_PARAMS *S3SaveParams);
#endif /* _AGESAWRAPPER_H_ */
diff --git a/src/northbridge/amd/agesa/oem_s3.c b/src/northbridge/amd/agesa/oem_s3.c
index f9ce4a7..f1d3e4e 100644
--- a/src/northbridge/amd/agesa/oem_s3.c
+++ b/src/northbridge/amd/agesa/oem_s3.c
@@ -117,15 +117,9 @@ static int spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len)
static u8 MTRRStorage[S3_DATA_MTRR_SIZE];
-AGESA_STATUS OemS3Save(void *vS3SaveParams)
+AGESA_STATUS OemS3Save(AMD_S3SAVE_PARAMS *S3SaveParams)
{
-#if IS_ENABLED(CONFIG_CPU_AMD_PI_00660F01)
- AMD_RTB_PARAMS *S3SaveParams = (AMD_RTB_PARAMS *)vS3SaveParams;
- S3_DATA_BLOCK *dataBlock = &S3SaveParams->S3DataBlock;
-#else
- AMD_S3SAVE_PARAMS *S3SaveParams = (AMD_S3SAVE_PARAMS *)vS3SaveParams;
AMD_S3_PARAMS *dataBlock = &S3SaveParams->S3DataBlock;
-#endif
u32 MTRRStorageSize = 0;
uintptr_t pos, size;
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