[coreboot-gerrit] Patch merged into coreboot/master: intel: Do not hardcode the position of mrc.cache

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 2c482a969a546a70c2787d4d96d1ac212da11eff
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date:   Mon Sep 7 01:54:23 2015 -0700

    intel: Do not hardcode the position of mrc.cache
    
    The reason for hardcoding the position of the MRC cache was to satisfy
    the alignment to the erase size of the flash chip. Hardcoding is no
    longer needed, as we can specify alignment directly. In the long term,
    the MRC cache will have to move to FMAP, but for now, we reduce
    fragmentation in CBFS.
    
    Note that soc/intel/common hardcoding of mrc.cache is not removed, as
    the mrc cache implementation there does not use CBFS to find the cache
    region, and needs a hardcoded address.
    
    Change-Id: I5b9fc1ba58bb484c7b5f687368172d9ebe625bfd
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
    Reviewed-on: http://review.coreboot.org/11527
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See http://review.coreboot.org/11527 for details.

-gerrit