[coreboot-gerrit] New patch to review for coreboot: samus: Use EC PD kconfig instead of manual PD reboot

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Mon Sep 7 18:43:19 CET 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11572

-gerrit

commit 82eec0e92cc33fb9fc1effd7e46d8f874ca4e493
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Fri Sep 4 10:15:42 2015 -0700

    samus: Use EC PD kconfig instead of manual PD reboot
    
    Use the new kconfig entry to select the EC PD chip and have it
    be rebooted before the EC automatically insetad of being done
    manually by the board.
    
    BUG=chrome-os-partner:40635
    BRANCH=none
    TEST=emerge-samus coreboot
    
    Change-Id: I9e7baffec500a83af1fcf9b1e43d418489172918
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 53b086725d9d595e8eff7e1e35b9ba8db17ca199
    Original-Change-Id: I9c9a7dd2ba2b78d681b448839f2c5d15ba9dfe60
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/297748
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/mainboard/google/samus/Kconfig    | 1 +
 src/mainboard/google/samus/romstage.c | 1 -
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mainboard/google/samus/Kconfig b/src/mainboard/google/samus/Kconfig
index 3059b4b..d8509fb 100644
--- a/src/mainboard/google/samus/Kconfig
+++ b/src/mainboard/google/samus/Kconfig
@@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOC_INTEL_BROADWELL
 	select BOARD_ROMSIZE_KB_8192
 	select EC_GOOGLE_CHROMEEC
+	select EC_GOOGLE_CHROMEEC_PD
 	select HAVE_ACPI_TABLES
 	select HAVE_OPTION_TABLE
 	select HAVE_ACPI_RESUME
diff --git a/src/mainboard/google/samus/romstage.c b/src/mainboard/google/samus/romstage.c
index 50e633b..d9efdd4 100644
--- a/src/mainboard/google/samus/romstage.c
+++ b/src/mainboard/google/samus/romstage.c
@@ -45,7 +45,6 @@ void mainboard_romstage_entry(struct romstage_params *rp)
 	printk(BIOS_INFO, "MLB: board version %s\n", samus_board_version());
 
 	/* Ensure the EC and PD are in the right mode for recovery */
-	google_chromeec_early_pd_init();
 	google_chromeec_early_init();
 
 	/* Initialize GPIOs */



More information about the coreboot-gerrit mailing list