[coreboot-gerrit] New patch to review for coreboot: kunimitsu: Select EC PD and software sync and do early init

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Mon Sep 7 18:43:22 CET 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11575

-gerrit

commit e8fbbff9426accfe07139c8e6b6b7751d9c43e0f
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Fri Sep 4 10:29:58 2015 -0700

    kunimitsu: Select EC PD and software sync and do early init
    
    Select the EC PD and software sync kconfig options so they are
    supported by the mainboard and call the EC early init function
    to reboot into RO in recovery mode.
    
    BUG=chrome-os-partner:40635
    BRANCH=none
    TEST=emerge-kunimitsu coreboot
    
    Change-Id: I48316df99b796c568c2481c72588b41f7147bec0
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: c7507470f82848062bc98da809d3c5fe1ca31998
    Original-Change-Id: I822aac9c24718f226819e5d3fcc82a4024b7c5a7
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/297751
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/mainboard/intel/kunimitsu/Kconfig    | 4 +++-
 src/mainboard/intel/kunimitsu/romstage.c | 3 +++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/intel/kunimitsu/Kconfig b/src/mainboard/intel/kunimitsu/Kconfig
index dd9e455..9447f8e 100644
--- a/src/mainboard/intel/kunimitsu/Kconfig
+++ b/src/mainboard/intel/kunimitsu/Kconfig
@@ -6,9 +6,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select BOARD_ROMSIZE_KB_16384
 	select CACHE_ROM
 	select EC_GOOGLE_CHROMEEC
+	select EC_GOOGLE_CHROMEEC_ACPI_MEMMAP
 	select EC_GOOGLE_CHROMEEC_LPC
 	select EC_GOOGLE_CHROMEEC_MEC
-	select EC_GOOGLE_CHROMEEC_ACPI_MEMMAP
+	select EC_GOOGLE_CHROMEEC_PD
+	select EC_SOFTWARE_SYNC
 	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
 	select HAVE_OPTION_TABLE
diff --git a/src/mainboard/intel/kunimitsu/romstage.c b/src/mainboard/intel/kunimitsu/romstage.c
index 1491794..269f297 100644
--- a/src/mainboard/intel/kunimitsu/romstage.c
+++ b/src/mainboard/intel/kunimitsu/romstage.c
@@ -42,6 +42,9 @@ static void early_config_gpio(void)
 
 void mainboard_romstage_entry(struct romstage_params *params)
 {
+	/* Ensure the EC and PD are in the right mode for recovery */
+	google_chromeec_early_init();
+
 	post_code(0x31);
 	early_config_gpio();
 



More information about the coreboot-gerrit mailing list