[coreboot-gerrit] Patch merged into coreboot/master: riscv-trap-handling: Add implementation for trap calls in riscv
gerrit at coreboot.org
gerrit at coreboot.org
Thu Sep 10 17:26:45 CET 2015
the following patch was just integrated into master:
commit 95ba4c87f5f4802e2afaeae38003db5e7235864a
Author: Thaminda Edirisooriya <thaminda at google.com>
Date: Wed Aug 26 14:54:31 2015 -0700
riscv-trap-handling: Add implementation for trap calls in riscv
RISCV requires the bios/bootloader to set up an interface by which it
can get information about memory, talk to host devices, etc. Put
implementation for spike in
src/mainboard/emulation/spike-riscv/spike_util.c, and
src/arch/riscv/trap_handler.c
Change-Id: Ie1d5f361595e48fa6cc1fac25485ad623ecdc717
Signed-off-by: Thaminda Edirisooriya <thaminda at google.com>
Reviewed-on: http://review.coreboot.org/11368
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>
See http://review.coreboot.org/11368 for details.
-gerrit
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