[coreboot-gerrit] Patch set updated for coreboot: chromeos: vboot and chromeos dependency removal for sw write protect state

[Paul Kocialkowski (contact@paulk.fr)]

Paul Kocialkowski (contact at paulk.fr) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11496

-gerrit

commit 0a8253ccec0555d7be1ce2954c6909d66ee7644d
Author: Paul Kocialkowski <contact at paulk.fr>
Date:   Thu Sep 3 11:27:27 2015 +0200

    chromeos: vboot and chromeos dependency removal for sw write protect state
    
    This removes the dependency on chromeos and vboot for the sw write protect state
    function: vboot_get_sw_write_protect, renamed to get_sw_write_protect_state to
    both reflect this change and become consistent with the definition of
    get_write_protect_state that is already in use.
    
    Change-Id: I47ce31530a03f6749e0f370e5d868466318b3bb6
    Signed-off-by: Paul Kocialkowski <contact at paulk.fr>
---
 src/include/bootmode.h                                | 1 +
 src/soc/intel/baytrail/romstage/romstage.c            | 4 +---
 src/soc/intel/broadwell/romstage/romstage.c           | 4 +---
 src/soc/intel/skylake/romstage/romstage.c             | 4 +---
 src/vendorcode/google/chromeos/chromeos.c             | 2 +-
 src/vendorcode/google/chromeos/chromeos.h             | 2 --
 src/vendorcode/google/chromeos/vboot2/vboot_handoff.c | 2 +-
 7 files changed, 6 insertions(+), 13 deletions(-)

diff --git a/src/include/bootmode.h b/src/include/bootmode.h
index 96c789b..730c0f3 100644
--- a/src/include/bootmode.h
+++ b/src/include/bootmode.h
@@ -23,6 +23,7 @@
 /* functions implemented per mainboard: */
 void init_bootmode_straps(void);
 int get_write_protect_state(void);
+int get_sw_write_protect_state(void);
 int get_developer_mode_switch(void);
 int get_recovery_mode_switch(void);
 int clear_recovery_mode_switch(void);
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index 1b93eb6..7bd2663 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -362,11 +362,9 @@ void ramstage_cache_invalid(void)
 #endif
 }
 
-#if CONFIG_CHROMEOS
-int vboot_get_sw_write_protect(void)
+int get_sw_write_protect_state(void)
 {
 	u8 status;
 	/* Return unprotected status if status read fails. */
 	return (early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80));
 }
-#endif
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 27fb0f2..884c274 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -147,13 +147,11 @@ void ramstage_cache_invalid(void)
 #endif
 }
 
-#if CONFIG_CHROMEOS
-int vboot_get_sw_write_protect(void)
+int get_sw_write_protect_state(void)
 {
 	u8 status;
 	/* Return unprotected status if status read fails. */
 	return (early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80));
 }
 
-#endif
 void __attribute__((weak)) mainboard_pre_console_init(void) {}
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 6c5d64a..6804459 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -68,15 +68,13 @@ void soc_romstage_init(struct romstage_params *params)
 	pch_early_init();
 }
 
-#if IS_ENABLED(CONFIG_CHROMEOS)
-int vboot_get_sw_write_protect(void)
+int get_sw_write_protect_state(void)
 {
 	u8 status;
 
 	/* Return unprotected status if status read fails. */
 	return early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80);
 }
-#endif
 
 /* UPD parameters to be initialized before MemoryInit */
 void soc_memory_init_params(struct romstage_params *params,
diff --git a/src/vendorcode/google/chromeos/chromeos.c b/src/vendorcode/google/chromeos/chromeos.c
index 0737267..c2190b7 100644
--- a/src/vendorcode/google/chromeos/chromeos.c
+++ b/src/vendorcode/google/chromeos/chromeos.c
@@ -65,7 +65,7 @@ void __attribute__((weak)) save_chromeos_gpios(void)
 	// Can be implemented by a mainboard
 }
 
-int __attribute__((weak)) vboot_get_sw_write_protect(void)
+int __attribute__((weak)) get_sw_write_protect_state(void)
 {
 	// Can be implemented by a platform / mainboard
 	return 0;
diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h
index c7048dd..798ab3e 100644
--- a/src/vendorcode/google/chromeos/chromeos.h
+++ b/src/vendorcode/google/chromeos/chromeos.h
@@ -68,8 +68,6 @@ static inline int vboot_get_handoff_info(void **addr, uint32_t *size)
 }
 #endif /* CONFIG_VBOOT_VERIFY_FIRMWARE */
 
-int vboot_get_sw_write_protect(void);
-
 #include "gnvs.h"
 struct device;
 
diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c b/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c
index c8ba114..8e12fdc 100644
--- a/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c
+++ b/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c
@@ -61,7 +61,7 @@ static void fill_vboot_handoff(struct vboot_handoff *vboot_handoff,
 
 	if (get_write_protect_state())
 		vb_sd->flags |= VBSD_BOOT_FIRMWARE_WP_ENABLED;
-	if (vboot_get_sw_write_protect())
+	if (get_sw_write_protect_state())
 		vb_sd->flags |= VBSD_BOOT_FIRMWARE_SW_WP_ENABLED;
 
 	if (vb2_sd->recovery_reason) {