[coreboot-gerrit] Patch set updated for coreboot: linking: link bootblock.elf with .data and .bss sections again

Aaron Durbin (adurbin@chromium.org) gerrit at coreboot.org
Thu Sep 17 22:36:20 CET 2015


Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11680

-gerrit

commit ef5737858eaf8cb734d1fb2be181ec3d080c32b5
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Thu Sep 17 17:02:53 2015 -0500

    linking: link bootblock.elf with .data and .bss sections again
    
    Currently coreboot expects the loader to clear the bss section
    for all stages. i.e. stages don't clear their own bss. On ARM
    SoCs the BootROM would be responsible for this. To do that
    one needs to include the bss section data (all zeros) in the
    bootblock.bin file. This was previously being attempted by
    keeping the .bss info in the .data section because objcopy
    happened zero out non-file allocated data section data.
    
    Instead go back to linking bootblock with the bss section
    but mark the bss section as loadable allocatable data. That
    way it will be included in the binary properly when objcopy
    -O binary is emplyed. Also do the same for the data section
    in the case of no non-zero object values are in the data
    section.
    
    Without this change the trick of including .bss in .data
    was not working when there wasn't a non-zero value object
    in the data section.
    
    BUG=None
    BRANCH=None
    TEST=Built emulation/qemu-armv7 and noted bootblock.bin contains
         the cleared bss.
    
    Change-Id: I94bd404c2c4a8b9332393e6224e98940a9cad4a2
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 Makefile.inc       | 12 ++++++++++++
 src/lib/program.ld |  7 -------
 2 files changed, 12 insertions(+), 7 deletions(-)

diff --git a/Makefile.inc b/Makefile.inc
index 81c149d..55635ba 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -531,6 +531,18 @@ find-substr = $(word 1,$(subst _, ,$(1)))
 # and remove .x the next time and finally return romstage
 find-class = $(if $(filter $(1),$(basename $(1))),$(if $(CC_$(1)), $(1), $(call find-substr,$(1))),$(call find-class,$(basename $(1))))
 
+# Bootblocks are not CBFS stages. coreboot is currently expecting the bss to
+# be cleared by the loader of the stage. For ARM SoCs that means one needs to
+# include the bss section in the binary so the BootROM clears the bss on
+# loading of the bootblock stage. Achieve this by marking the bss section
+# loadable,allocatable, and data. Do the same for the .data section in case
+# it's marked as NOBITS.
+$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.elf
+	$(eval class := $(call find-class,$(@F)))
+	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
+	$(OBJCOPY_$(class)) --set-section-flags .bss=load,alloc,data --set-section-flags .data=loa,alloc,data $< $<.tmp
+	$(OBJCOPY_$(class)) -O binary $<.tmp $@
+
 $(objcbfs)/%.bin: $(objcbfs)/%.elf
 	$(eval class := $(call find-class,$(@F)))
 	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
diff --git a/src/lib/program.ld b/src/lib/program.ld
index c8ce5ee..ab36239 100644
--- a/src/lib/program.ld
+++ b/src/lib/program.ld
@@ -111,14 +111,7 @@
 #endif
 
 #if ARCH_STAGE_HAS_BSS_SECTION
-#if ENV_BOOTBLOCK
-/* Bootblocks are not CBFS stages, so they cannot communicate the amount of
- * (memsz - filesz) bytes the loader needs to clear for them. Therefore we merge
- * the BSS into the .data section so those zeroes get loaded explicitly. */
-.data . : {
-#else
 .bss . : {
-#endif
 	. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
 	_bss = .;
 	*(.bss)



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