[coreboot-gerrit] Patch set updated for coreboot: RISCV: modify arch_prog_run to handle payloads correctly.
Ronald G. Minnich (rminnich@gmail.com)
gerrit at coreboot.org
Wed Sep 23 16:20:20 CET 2015
Ronald G. Minnich (rminnich at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11699
-gerrit
commit 37cd07ad1a305b87360cf49b643b67201d62e638
Author: Ronald G. Minnich <rminnich at gmail.com>
Date: Tue Sep 22 15:53:32 2015 -0700
RISCV: modify arch_prog_run to handle payloads correctly.
Unlike the other stages, the payload requires virtual memory to be set up
and also a privelege level change.
Change-Id: Ibbe2a55f7719d917f121a53a17c6d90e6b2ab3d1
Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
---
src/arch/riscv/boot.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c
index d07d825..ab4ae95 100644
--- a/src/arch/riscv/boot.c
+++ b/src/arch/riscv/boot.c
@@ -18,11 +18,19 @@
*/
#include <program_loading.h>
+#include <vm.h>
+#include <arch/encoding.h>
+#include <rules.h>
void arch_prog_run(struct prog *prog)
{
- void (*doit)(void *);
+ void (*doit)(void *) = prog_entry(prog);
- doit = prog_entry(prog);
- doit(prog_entry_arg(prog));
+ if (ENV_RAMSTAGE && prog_type(prog) == ASSET_PAYLOAD) {
+ initVirtualMemory();
+ write_csr(mepc, doit);
+ asm volatile("eret");
+ } else {
+ doit(prog_entry_arg(prog));
+ }
}
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