[coreboot-gerrit] New patch to review for coreboot: AMD Bettong: read board version
WANG Siyuan (wangsiyuanbuaa@gmail.com)
gerrit at coreboot.org
Fri Sep 25 05:06:16 CET 2015
WANG Siyuan (wangsiyuanbuaa at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11707
-gerrit
commit 568f51b4e5b3110c188c01cdb80ed1259ff0ba1e
Author: WANG Siyuan <wangsiyuanbuaa at gmail.com>
Date: Fri Jul 3 20:29:56 2015 +0800
AMD Bettong: read board version
Bettong use 3 GPIO ports to identify board.
The GPIO are mapped to MMIO space.
Change-Id: I3874020e0f0f87edc57ee1378d5c6d4a292a92ef
Signed-off-by: WANG Siyuan <wangsiyuanbuaa at gmail.com>
Signed-off-by: WANG Siyuan <SiYuan.Wang at amd.com>
---
src/mainboard/amd/bettong/Makefile.inc | 2 ++
src/mainboard/amd/bettong/board_rev.c | 45 ++++++++++++++++++++++++++++++++++
src/mainboard/amd/bettong/board_rev.h | 25 +++++++++++++++++++
3 files changed, 72 insertions(+)
diff --git a/src/mainboard/amd/bettong/Makefile.inc b/src/mainboard/amd/bettong/Makefile.inc
index 70722ee..513826c 100644
--- a/src/mainboard/amd/bettong/Makefile.inc
+++ b/src/mainboard/amd/bettong/Makefile.inc
@@ -19,9 +19,11 @@
romstage-y += BiosCallOuts.c
romstage-y += PlatformGnbPcie.c
+romstage-y += board_rev.c
ramstage-y += BiosCallOuts.c
ramstage-y += PlatformGnbPcie.c
ifeq ($(CONFIG_HUDSON_IMC_FWM), y)
ramstage-y += fchec.c
endif
+ramstage-y += board_rev.c
diff --git a/src/mainboard/amd/bettong/board_rev.c b/src/mainboard/amd/bettong/board_rev.c
new file mode 100644
index 0000000..be9dbbc
--- /dev/null
+++ b/src/mainboard/amd/bettong/board_rev.c
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include <stdint.h>
+#include <arch/io.h>
+#include <arch/acpi.h>
+#include <console/console.h>
+#include <reset.h>
+#include "board_rev.h"
+
+char get_board_id(void)
+{
+ u32 gpiommioaddr;
+ u8 value = 0;
+ u8 boardrev = 0;
+ char boardid = 'u';
+
+ gpiommioaddr = 0xfed80000ul + 0x1500;
+ value = *(volatile u8 *) (gpiommioaddr + (7 << 2) + 2); //agpio7 //board_id2
+ boardrev = value & 1;
+ value = *(volatile u8 *) (gpiommioaddr + (6 << 2) + 2); //agpio6 //board_id1
+ boardrev |= (value & 1) << 1;
+ value = *(volatile u8 *) (gpiommioaddr + (5 << 2) + 2); //agpio5 //board_id0
+ boardrev |= (value & 1) << 2;
+
+ boardid = 'A' + boardrev;
+
+ return boardid;
+}
diff --git a/src/mainboard/amd/bettong/board_rev.h b/src/mainboard/amd/bettong/board_rev.h
new file mode 100644
index 0000000..ea7a0f3
--- /dev/null
+++ b/src/mainboard/amd/bettong/board_rev.h
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef _BOARD_REV_H
+#define _BOARD_REV_H
+
+char get_board_id(void);
+
+#endif
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