[coreboot-gerrit] New patch to review for coreboot: arm64: mmu: Prevent CPU prefetch instructions from device memory

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11722

-gerrit

commit 5d78f70ff7bbe0b8886b2410f72b051683093a60
Author: Jimmy Huang <jimmy.huang at mediatek.com>
Date:   Tue Sep 15 15:29:10 2015 +0800

    arm64: mmu: Prevent CPU prefetch instructions from device memory
    
    Set XN bit of block upper attribute to device memory in mmu. CPU may
    speculatively prefetch instructions from device memory, but the IO
    subsystem of some implementation may not support this operation. Set
    this attribute to device memory mmu entries can prevent CPU from
    prefetching device memory.
    
    BRANCH=none
    BUG=none
    TEST=build and booted to kernel on oak-rev3 with dcm enabled.
    
    Change-Id: I52ac7d7c84220624aaf6a48d64b9110d7afeb293
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 7b01a4157cb046a5e75ea7625060a602e7a63c3c
    Original-Change-Id: Id535e990a23b6c89123b5a4e64d7ed21eebed607
    Original-Signed-off-by: Jimmy Huang <jimmy.huang at mediatek.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/302301
    Original-Commit-Ready: Yidi Lin <yidi.lin at mediatek.com>
    Original-Tested-by: Yidi Lin <yidi.lin at mediatek.com>
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
---
 payloads/libpayload/arch/arm64/mmu.c         | 1 +
 payloads/libpayload/include/arm64/arch/mmu.h | 2 ++
 src/arch/arm64/armv8/mmu.c                   | 1 +
 src/arch/arm64/include/armv8/arch/mmu.h      | 2 ++
 4 files changed, 6 insertions(+)

diff --git a/payloads/libpayload/arch/arm64/mmu.c b/payloads/libpayload/arch/arm64/mmu.c
index e2a0cb1..f07e4c4 100644
--- a/payloads/libpayload/arch/arm64/mmu.c
+++ b/payloads/libpayload/arch/arm64/mmu.c
@@ -91,6 +91,7 @@ static uint64_t get_block_attr(unsigned long tag)
 		break;
 	case TYPE_DEV_MEM:
 		attr |= BLOCK_INDEX_MEM_DEV_NGNRNE << BLOCK_INDEX_SHIFT;
+		attr |= BLOCK_XN;
 		break;
 	case TYPE_DMA_MEM:
 		attr |= BLOCK_INDEX_MEM_NORMAL_NC << BLOCK_INDEX_SHIFT;
diff --git a/payloads/libpayload/include/arm64/arch/mmu.h b/payloads/libpayload/include/arm64/arch/mmu.h
index 30a1973..2f87d09 100644
--- a/payloads/libpayload/include/arm64/arch/mmu.h
+++ b/payloads/libpayload/include/arm64/arch/mmu.h
@@ -72,6 +72,8 @@ extern char _start[], _end[];
 
 #define BLOCK_ACCESS               (1 << 10)
 
+#define BLOCK_XN                   (1UL << 54)
+
 #define BLOCK_SH_SHIFT                 (8)
 #define BLOCK_SH_NON_SHAREABLE         (0 << BLOCK_SH_SHIFT)
 #define BLOCK_SH_UNPREDICTABLE         (1 << BLOCK_SH_SHIFT)
diff --git a/src/arch/arm64/armv8/mmu.c b/src/arch/arm64/armv8/mmu.c
index a3e8d77..5c95e96 100644
--- a/src/arch/arm64/armv8/mmu.c
+++ b/src/arch/arm64/armv8/mmu.c
@@ -76,6 +76,7 @@ static uint64_t get_block_attr(unsigned long tag)
 			attr |= BLOCK_INDEX_MEM_NORMAL << BLOCK_INDEX_SHIFT;
 	} else {
 		attr |= BLOCK_INDEX_MEM_DEV_NGNRNE << BLOCK_INDEX_SHIFT;
+		attr |= BLOCK_XN;
 	}
 
 	return attr;
diff --git a/src/arch/arm64/include/armv8/arch/mmu.h b/src/arch/arm64/include/armv8/arch/mmu.h
index f5111ae..f697ddb 100644
--- a/src/arch/arm64/include/armv8/arch/mmu.h
+++ b/src/arch/arm64/include/armv8/arch/mmu.h
@@ -56,6 +56,8 @@
 
 #define BLOCK_ACCESS               (1 << 10)
 
+#define BLOCK_XN                   (1UL << 54)
+
 #define BLOCK_SH_SHIFT                 (8)
 #define BLOCK_SH_NON_SHAREABLE         (0 << BLOCK_SH_SHIFT)
 #define BLOCK_SH_UNPREDICTABLE         (1 << BLOCK_SH_SHIFT)