[coreboot-gerrit] Patch set updated for coreboot: intel: auto include intel/common/firmware
Aaron Durbin (adurbin@chromium.org)
gerrit at coreboot.org
Mon Sep 28 19:46:38 CET 2015
Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11734
-gerrit
commit d6fea682c7dd7de27be11db1f7ac984204be2df9
Author: Aaron Durbin <adurbin at chromium.org>
Date: Thu Jul 30 16:50:21 2015 -0500
intel: auto include intel/common/firmware
Instead of selecting the Kconfig option and adding the subdir
entry within each chipset auto include the common/firmware
directory as it's guarded by HAVE_INTEL_FIRMWARE.
BUG=chrome-os-partner:43462
BRANCH=None
TEST=Built glados.
Change-Id: I166db67c41b16c4d9f0116abce00940514539fa5
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/soc/intel/baytrail/Makefile.inc | 1 -
src/soc/intel/braswell/Makefile.inc | 1 -
src/soc/intel/broadwell/Makefile.inc | 1 -
src/soc/intel/fsp_baytrail/Makefile.inc | 1 -
src/southbridge/intel/bd82x6x/Makefile.inc | 2 --
src/southbridge/intel/common/Makefile.inc | 3 +++
src/southbridge/intel/fsp_bd82x6x/Makefile.inc | 2 --
src/southbridge/intel/fsp_rangeley/Makefile.inc | 2 --
src/southbridge/intel/ibexpeak/Makefile.inc | 2 --
src/southbridge/intel/lynxpoint/Makefile.inc | 2 --
10 files changed, 3 insertions(+), 14 deletions(-)
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc
index e8c5022..085a45e 100644
--- a/src/soc/intel/baytrail/Makefile.inc
+++ b/src/soc/intel/baytrail/Makefile.inc
@@ -8,7 +8,6 @@ subdirs-y += ../../../cpu/x86/smm
subdirs-y += ../../../cpu/x86/tsc
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
-subdirs-y += ../../../southbridge/intel/common/firmware
ramstage-y += memmap.c
romstage-y += memmap.c
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc
index eda9f76..e5ac640 100644
--- a/src/soc/intel/braswell/Makefile.inc
+++ b/src/soc/intel/braswell/Makefile.inc
@@ -8,7 +8,6 @@ subdirs-y += ../../../cpu/x86/smm
subdirs-y += ../../../cpu/x86/tsc
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
-subdirs-y += ../../../southbridge/intel/common/firmware
romstage-y += gpio_support.c
romstage-y += iosf.c
diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc
index 183c40f..fdd064d 100644
--- a/src/soc/intel/broadwell/Makefile.inc
+++ b/src/soc/intel/broadwell/Makefile.inc
@@ -8,7 +8,6 @@ subdirs-y += ../../../cpu/x86/smm
subdirs-y += ../../../cpu/x86/tsc
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
-subdirs-y += ../../../southbridge/intel/common/firmware
ramstage-y += acpi.c
ramstage-y += adsp.c
diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc
index 45ea3e4..39a253f 100644
--- a/src/soc/intel/fsp_baytrail/Makefile.inc
+++ b/src/soc/intel/fsp_baytrail/Makefile.inc
@@ -30,7 +30,6 @@ subdirs-y += ../../../cpu/x86/cache
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../lib/fsp
subdirs-y += fsp
-subdirs-y += ../../../southbridge/intel/common/firmware
ramstage-y += memmap.c
romstage-y += memmap.c
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc
index 9214450..a1256df 100644
--- a/src/southbridge/intel/bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/bd82x6x/Makefile.inc
@@ -19,8 +19,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_C216)$(CONFIG_SOUTHBRIDGE_INTEL_BD82X6X),y)
-subdirs-y += ../common/firmware
-
ramstage-y += pch.c
ramstage-y += azalia.c
ramstage-y += lpc.c
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index 86823a1..36dc432 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -17,6 +17,9 @@
## Foundation, Inc.
##
+# CONFIG_HAVE_INTEL_FIRMWARE protects doing anything to the build.
+subdirs-y += firmware
+
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y)
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c
diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
index 228b6eb..d14d303 100644
--- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
@@ -20,8 +20,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X),y)
-subdirs-y += ../common/firmware
-
ramstage-y += pch.c
ramstage-y += azalia.c
ramstage-y += lpc.c
diff --git a/src/southbridge/intel/fsp_rangeley/Makefile.inc b/src/southbridge/intel/fsp_rangeley/Makefile.inc
index 1d35b54..2a66b90 100644
--- a/src/southbridge/intel/fsp_rangeley/Makefile.inc
+++ b/src/southbridge/intel/fsp_rangeley/Makefile.inc
@@ -20,8 +20,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_FSP_RANGELEY),y)
-subdirs-y += ../common/firmware
-
ramstage-y += soc.c
ramstage-y += lpc.c
ramstage-y += sata.c
diff --git a/src/southbridge/intel/ibexpeak/Makefile.inc b/src/southbridge/intel/ibexpeak/Makefile.inc
index 57c498d..77f2797 100644
--- a/src/southbridge/intel/ibexpeak/Makefile.inc
+++ b/src/southbridge/intel/ibexpeak/Makefile.inc
@@ -19,8 +19,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_IBEXPEAK),y)
-subdirs-y += ../common/firmware
-
ramstage-y += ../bd82x6x/pch.c
ramstage-y += azalia.c
ramstage-y += lpc.c
diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc
index a42fe39..7cff6b8 100644
--- a/src/southbridge/intel/lynxpoint/Makefile.inc
+++ b/src/southbridge/intel/lynxpoint/Makefile.inc
@@ -19,8 +19,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT),y)
-subdirs-y += ../common/firmware
-
ramstage-y += pch.c
ramstage-y += azalia.c
ramstage-y += lpc.c
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