[coreboot-gerrit] New patch to review for coreboot: northbridge/intel/gm45: Fixed FTBFS on Lenovo X200

Audrey Pearson (apearson@raptorengineeringinc.com) gerrit at coreboot.org
Tue Sep 29 18:07:28 CET 2015


Audrey Pearson (apearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11738

-gerrit

commit 953e2a1630fe606edf92c9bfcd5e1eebebe77dea
Author: Audrey Pearson <apearson at raptorengineeringinc.com>
Date:   Tue Sep 29 12:36:52 2015 -0500

    northbridge/intel/gm45: Fixed FTBFS on Lenovo X200
    
    Change-Id: Ifd36571c9c00761b4a2a6deb3c9c4a52d9d13e25
    Signed-off-by: Audrey Pearson <apearson at raptorengineeringinc.com>
---
 src/northbridge/intel/gm45/gma.c | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index f29b9b1..ffe3019 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -161,19 +161,19 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info,
 
 	hactive = edid.x_resolution;
 	vactive = edid.y_resolution;
-	right_border = edid.hborder;
-	bottom_border = edid.vborder;
-	hpolarity = (edid.phsync == '-');
-	vpolarity = (edid.pvsync == '-');
-	vsync = edid.vspw;
-	hsync = edid.hspw;
-	vblank = edid.vbl;
-	hblank = edid.hbl;
-	hfront_porch = edid.hso;
-	vfront_porch = edid.vso;
-
-	target_frequency = info->gfx.lvds_dual_channel ? edid.pixel_clock
-		: (2 * edid.pixel_clock);
+	right_border = edid.mode.hborder;
+	bottom_border = edid.mode.vborder;
+	hpolarity = (edid.mode.phsync == '-');
+	vpolarity = (edid.mode.pvsync == '-');
+	vsync = edid.mode.vspw;
+	hsync = edid.mode.hspw;
+	vblank = edid.mode.vbl;
+	hblank = edid.mode.hbl;
+	hfront_porch = edid.mode.hso;
+	vfront_porch = edid.mode.vso;
+
+	target_frequency = info->gfx.lvds_dual_channel ? edid.mode.pixel_clock
+		: (2 * edid.mode.pixel_clock);
 #if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)
 	vga_sr_write(1, 1);
 	vga_sr_write(0x2, 0xf);
@@ -240,8 +240,8 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info,
 		return;
 	}
 
-	link_m1 = ((uint64_t)link_n1 * edid.pixel_clock) / link_frequency;
-	data_m1 = ((uint64_t)data_n1 * 18 * edid.pixel_clock)
+	link_m1 = ((uint64_t)link_n1 * edid.mode.pixel_clock) / link_frequency;
+	data_m1 = ((uint64_t)data_n1 * 18 * edid.mode.pixel_clock)
 		/ (link_frequency * 8 * (info->gfx.lvds_num_lanes ? : 4));
 
 	printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n",



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