[coreboot-gerrit] Patch set updated for coreboot: AMD Bettong: add README
WANG Siyuan (wangsiyuanbuaa@gmail.com)
gerrit at coreboot.org
Wed Sep 30 01:24:10 CET 2015
WANG Siyuan (wangsiyuanbuaa at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11737
-gerrit
commit a000c294cd06c17ad8945ee7064e17de9d76f32d
Author: WANG Siyuan <wangsiyuanbuaa at gmail.com>
Date: Tue Sep 29 11:12:03 2015 +0800
AMD Bettong: add README
AMD provide stable Bettong code in github.
Change-Id: Ie8b761096fd1850afb9363ebb761aa4992b47643
Signed-off-by: WANG Siyuan <wangsiyuanbuaa at gmail.com>
Signed-off-by: WANG Siyuan <SiYuan.Wang at amd.com>
---
src/mainboard/amd/bettong/README | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/src/mainboard/amd/bettong/README b/src/mainboard/amd/bettong/README
new file mode 100644
index 0000000..b13c985
--- /dev/null
+++ b/src/mainboard/amd/bettong/README
@@ -0,0 +1,24 @@
+coreboot is changing all the time and the patches are reabsed when pushed to
+community, so it is a little difficult to provide stable Bettong code.
+From now on, AMD provides source code which is validated by QA team.
+The code is pushed to github https://github.com/BTDC/coreboot
+The version is identified by a tag. All the changes will be pushed to coreboot
+community.
+
+=====
+Version: TCMEF1F0:
+Changes from last version:
+1. Fix external graphics issue.
+2. Add board ID support.
+3. Support DDR4.
+4. Support SD 2.0.
+5. Fix Windows 7 S4 issue.
+6. Add GPIO, I2C and UART support.
+7. Fix the interrupt routine.
+8. Restruct PCI interrupt table (C00/C01).
+9. Fix DSDT issue.
+10. Fix the PCIe lane map.
+11. Lower the TOM to give more MMIO space.
+12. Add USB device.
+13. Set the USB3 port as unremoveable.
+14. Update AGESA to CarrizoPI 1.1.0.1.
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