[coreboot-gerrit] New patch to review for coreboot: drivers/intel/fsp2_0: Ensure EC is in right mode before memory init

[Furquan Shaikh (furquan@google.com)]

Furquan Shaikh (furquan at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16034

-gerrit

commit 028695b6729664cd74c62102eed9e32ac9ba9216
Author: Furquan Shaikh <furquan at google.com>
Date:   Tue Aug 2 14:04:59 2016 -0700

    drivers/intel/fsp2_0: Ensure EC is in right mode before memory init
    
    If EC_GOOGLE_CHROMEEC is enabled, ensure that the EC is in correct mode
    before running memory init. This saves additional memory training
    required in recovery path because of reboot later in ramstage.
    
    BUG=chrome-os-partner:54245
    
    Change-Id: Ic71c054afdcd0001cea95563fe513783b56f3e60
    Signed-off-by: Furquan Shaikh <furquan at google.com>
---
 src/drivers/intel/fsp2_0/memory_init.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 7aaed3c..4eabb8e 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -17,6 +17,7 @@
 #include <cbfs.h>
 #include <cbmem.h>
 #include <console/console.h>
+#include <ec/google/chromeec/ec.h>
 #include <elog.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
@@ -300,6 +301,14 @@ enum fsp_status fsp_memory_init(bool s3wake)
 	if (IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) && !s3wake)
 		boot_count_increment();
 
+	/*
+	 * Before doing any memory init/training, ensure that the EC is in the
+	 * right mode. This saves an additional memory training when in recovery
+	 * mode.
+	 */
+	if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
+		google_chromeec_early_init();
+
 	if (cbfs_boot_locate(&file_desc, name, NULL)) {
 		printk(BIOS_ERR, "Could not locate %s in CBFS\n", name);
 		return FSP_NOT_FOUND;