[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/skylake: Correct address of I2C5 Device

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit d03596f4ca9ff27f0483381eaca1a54d01a14165
Author: Barnali Sarkar <barnali.sarkar at intel.com>
Date:   Wed Aug 3 18:45:07 2016 +0530

    soc/intel/skylake: Correct address of I2C5 Device
    
    This corrects the address of the I2C5 Device. The I2C
    Controller #5 is on PCI Bus 0: Device 25: Function 1. The ACPI
    Address Encoding Logic is - High word = Device #.
                                Low word = Function #.
    So, I2C5 (_ADR) = 0x0019 0001.
    
    BUG=none
    BRANCH=none
    TEST=Build and boot kunimitsu
    
    Change-Id: I4719a843260ef58cc2307e909e9ccbffea519177
    Signed-off-by: Barnali Sarkar <barnali.sarkar at intel.com>
    Reviewed-on: https://review.coreboot.org/16048
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>


See https://review.coreboot.org/16048 for details.

-gerrit