[coreboot-gerrit] New patch to review for coreboot: soc/apollolake: enable access to RTC NVRAM

[Ravishankar Sarawadi (ravishankar.sarawadi@intel.com)]

Ravishankar Sarawadi (ravishankar.sarawadi at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16144

-gerrit

commit 4f458427e89a1c5865750883ee7243a366f7386f
Author: Ravi Sarawadi <ravishankar.sarawadi at intel.com>
Date:   Wed Aug 10 11:33:56 2016 -0700

    soc/apollolake: enable access to RTC NVRAM
    
    FSP unconditionally locks parts of the NVRAM in the RTC.
    This change will enable coreboot to update the locking policy
    and be able to unlock the region
    
    BUG=chrome-os-partner:55944
    TEST=Check 'crossystem dev_boot_usb=1'
    
    Change-Id: I70fd2bafa6ff9eb9cdf284b9780e4b90dee0f4ce
    Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi at intel.com>
---
 src/soc/intel/apollolake/chip.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 345d7c4..1b109d0 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -397,6 +397,9 @@ void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)
 
 	/* Disable setting of EISS bit in FSP. */
 	silconfig->SpiEiss = 0;
+
+	/* Disable FSP from locking access to the RTC NVRAM */
+	silconfig->RtcLock = 0;
 }
 
 struct chip_operations soc_intel_apollolake_ops = {