[coreboot-gerrit] Patch set updated for coreboot: drivers/spi: move cbfs_spi.c location
Aaron Durbin (adurbin@chromium.org)
gerrit at coreboot.org
Mon Aug 15 21:26:47 CEST 2016
Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16212
-gerrit
commit 210cbf2e3396a33c4f3d77b0b2fb4b9411ba9654
Author: Aaron Durbin <adurbin at chromium.org>
Date: Fri Aug 12 15:50:16 2016 -0500
drivers/spi: move cbfs_spi.c location
The common boot device spi implementation is very much
specific to SPI flash. As such it should be moved into
that subdirectory. It's still a high-level option but
it correctly depends on BOOT_DEVICE_SPI_FLASH. Additionally
that allows the auto-selection of SPI_FLASH by a platform
selecting COMMON_CBFS_SPI_WRAPPER which allows for culling
of SPI_FLASH selections everywhere.
BUG=chrome-os-partner:56151
Change-Id: Ia2ccfdc9e1a4348cd91b381f9712d8853b7d2a79
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/Kconfig | 8 -----
src/drivers/spi/Kconfig | 8 +++++
src/drivers/spi/Makefile.inc | 4 +++
src/drivers/spi/cbfs_spi.c | 80 ++++++++++++++++++++++++++++++++++++++++++++
src/lib/Makefile.inc | 5 ---
src/lib/cbfs_spi.c | 80 --------------------------------------------
6 files changed, 92 insertions(+), 93 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig
index f7a924f..fd98cc8 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -35,14 +35,6 @@ config CBFS_PREFIX
Select the prefix to all files put into the image. It's "fallback"
by default, "normal" is a common alternative.
-config COMMON_CBFS_SPI_WRAPPER
- bool
- default n
- depends on SPI_FLASH
- depends on !ARCH_X86
- help
- Use common wrapper to interface CBFS to SPI bootrom.
-
choice
prompt "Compiler to use"
default COMPILER_GCC
diff --git a/src/drivers/spi/Kconfig b/src/drivers/spi/Kconfig
index b0187fd..030fa6c 100644
--- a/src/drivers/spi/Kconfig
+++ b/src/drivers/spi/Kconfig
@@ -13,6 +13,14 @@
## GNU General Public License for more details.
##
+config COMMON_CBFS_SPI_WRAPPER
+ bool
+ default n
+ depends on !ARCH_X86
+ depends on BOOT_DEVICE_SPI_FLASH
+ help
+ Use common wrapper to interface CBFS to SPI bootrom.
+
config SPI_FLASH
bool
default y if BOOT_DEVICE_SPI_FLASH
diff --git a/src/drivers/spi/Makefile.inc b/src/drivers/spi/Makefile.inc
index 6b4182e..e976059 100644
--- a/src/drivers/spi/Makefile.inc
+++ b/src/drivers/spi/Makefile.inc
@@ -8,6 +8,7 @@ smm-$(CONFIG_DEBUG_SMI) += spiconsole.c
endif
ifeq ($(CONFIG_COMMON_CBFS_SPI_WRAPPER),y)
+bootblock-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
bootblock-y += spi_flash.c
bootblock-$(CONFIG_SPI_FLASH_EON) += eon.c
bootblock-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.c
@@ -18,6 +19,7 @@ bootblock-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.c
bootblock-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c
bootblock-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c
+romstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
romstage-$(CONFIG_SPI_FLASH) += spi_flash.c
romstage-$(CONFIG_SPI_FLASH_EON) += eon.c
romstage-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.c
@@ -28,6 +30,7 @@ romstage-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.c
romstage-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c
romstage-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c
+verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
verstage-$(CONFIG_SPI_FLASH) += spi_flash.c
verstage-$(CONFIG_SPI_FLASH_EON) += eon.c
verstage-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.c
@@ -40,6 +43,7 @@ verstage-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c
endif
+ramstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
ramstage-$(CONFIG_SPI_FLASH) += spi_flash.c
# drivers
diff --git a/src/drivers/spi/cbfs_spi.c b/src/drivers/spi/cbfs_spi.c
new file mode 100644
index 0000000..bbe9125
--- /dev/null
+++ b/src/drivers/spi/cbfs_spi.c
@@ -0,0 +1,80 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * This file provides a common CBFS wrapper for SPI storage. SPI driver
+ * context is expanded with the buffer descriptor used to store data read from
+ * SPI.
+ */
+
+#include <boot_device.h>
+#include <spi_flash.h>
+#include <symbols.h>
+#include <cbmem.h>
+
+static struct spi_flash *spi_flash_info;
+
+static ssize_t spi_readat(const struct region_device *rd, void *b,
+ size_t offset, size_t size)
+{
+ if (spi_flash_info->read(spi_flash_info, offset, size, b))
+ return -1;
+ return size;
+}
+
+static const struct region_device_ops spi_ops = {
+ .mmap = mmap_helper_rdev_mmap,
+ .munmap = mmap_helper_rdev_munmap,
+ .readat = spi_readat,
+};
+
+static struct mmap_helper_region_device mdev =
+ MMAP_HELPER_REGION_INIT(&spi_ops, 0, CONFIG_ROM_SIZE);
+
+static void switch_to_postram_cache(int unused)
+{
+ /*
+ * Call boot_device_init() to ensure spi_flash is initialized before
+ * backing mdev with postram cache. This prevents the mdev backing from
+ * being overwritten if spi_flash was not accessed before dram was up.
+ */
+ boot_device_init();
+ if (_preram_cbfs_cache != _postram_cbfs_cache)
+ mmap_helper_device_init(&mdev, _postram_cbfs_cache,
+ _postram_cbfs_cache_size);
+}
+ROMSTAGE_CBMEM_INIT_HOOK(switch_to_postram_cache);
+
+void boot_device_init(void)
+{
+ int bus = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS;
+ int cs = 0;
+
+ if (spi_flash_info != NULL)
+ return;
+
+ spi_flash_info = spi_flash_probe(bus, cs);
+
+ mmap_helper_device_init(&mdev, _cbfs_cache, _cbfs_cache_size);
+}
+
+/* Return the CBFS boot device. */
+const struct region_device *boot_device_ro(void)
+{
+ if (spi_flash_info == NULL)
+ return NULL;
+
+ return &mdev.rdev;
+}
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 5f708a6..e2cf9ef 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -22,7 +22,6 @@ endif
bootblock-y += prog_loaders.c
bootblock-y += prog_ops.c
bootblock-y += cbfs.c
-bootblock-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
bootblock-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c
bootblock-y += libgcc.c
bootblock-$(CONFIG_GENERIC_UDELAY) += timer.c
@@ -49,7 +48,6 @@ verstage-y += memcmp.c
verstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
verstage-y += boot_device.c
verstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
-verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
ifeq ($(MOCK_TPM),1)
libverstage-y += mocked_tlcl.c
@@ -73,7 +71,6 @@ $(foreach arch,$(ARCH_SUPPORTED),\
romstage-y += fmap.c
romstage-y += delay.c
romstage-y += cbfs.c
-romstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
romstage-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c lzmadecode.c
romstage-y += libgcc.c
romstage-y += memrange.c
@@ -117,7 +114,6 @@ ramstage-y += delay.c
ramstage-y += fallback_boot.c
ramstage-y += compute_ip_checksum.c
ramstage-y += cbfs.c
-ramstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
ramstage-y += lzma.c lzmadecode.c
ramstage-y += stack.c
ramstage-y += hexstrtobin.c
@@ -214,7 +210,6 @@ smm-y += halt.c
postcar-y += bootmode.c
postcar-y += boot_device.c
postcar-y += cbfs.c
-postcar-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
postcar-y += delay.c
postcar-y += fmap.c
postcar-y += gcc.c
diff --git a/src/lib/cbfs_spi.c b/src/lib/cbfs_spi.c
deleted file mode 100644
index bbe9125..0000000
--- a/src/lib/cbfs_spi.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/*
- * This file provides a common CBFS wrapper for SPI storage. SPI driver
- * context is expanded with the buffer descriptor used to store data read from
- * SPI.
- */
-
-#include <boot_device.h>
-#include <spi_flash.h>
-#include <symbols.h>
-#include <cbmem.h>
-
-static struct spi_flash *spi_flash_info;
-
-static ssize_t spi_readat(const struct region_device *rd, void *b,
- size_t offset, size_t size)
-{
- if (spi_flash_info->read(spi_flash_info, offset, size, b))
- return -1;
- return size;
-}
-
-static const struct region_device_ops spi_ops = {
- .mmap = mmap_helper_rdev_mmap,
- .munmap = mmap_helper_rdev_munmap,
- .readat = spi_readat,
-};
-
-static struct mmap_helper_region_device mdev =
- MMAP_HELPER_REGION_INIT(&spi_ops, 0, CONFIG_ROM_SIZE);
-
-static void switch_to_postram_cache(int unused)
-{
- /*
- * Call boot_device_init() to ensure spi_flash is initialized before
- * backing mdev with postram cache. This prevents the mdev backing from
- * being overwritten if spi_flash was not accessed before dram was up.
- */
- boot_device_init();
- if (_preram_cbfs_cache != _postram_cbfs_cache)
- mmap_helper_device_init(&mdev, _postram_cbfs_cache,
- _postram_cbfs_cache_size);
-}
-ROMSTAGE_CBMEM_INIT_HOOK(switch_to_postram_cache);
-
-void boot_device_init(void)
-{
- int bus = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS;
- int cs = 0;
-
- if (spi_flash_info != NULL)
- return;
-
- spi_flash_info = spi_flash_probe(bus, cs);
-
- mmap_helper_device_init(&mdev, _cbfs_cache, _cbfs_cache_size);
-}
-
-/* Return the CBFS boot device. */
-const struct region_device *boot_device_ro(void)
-{
- if (spi_flash_info == NULL)
- return NULL;
-
- return &mdev.rdev;
-}
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