[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/apollolake: make SPI support early stages

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 1ad9f946b6886f08c2cae8503d7efc3f569c1a93
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Thu Aug 11 17:09:57 2016 -0500

    soc/intel/apollolake: make SPI support early stages
    
    Using malloc() in SPI code is unnecessary as there's only
    one SPI device that the SoC support code handles: boot
    device. Therefore, use CAR to for the storage to work around
    the current limiations of the SPI API which expects one to
    return pointers to objects that are writable.
    
    BUG=chrome-os-partner:56151
    
    Change-Id: If4f5484e27d68b2dd1b17a281cf0b760086850a7
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://review.coreboot.org/16195
    Tested-by: build bot (Jenkins)
    Reviewed-by: Furquan Shaikh <furquan at google.com>


See https://review.coreboot.org/16195 for details.

-gerrit