[coreboot-gerrit] Patch set updated for coreboot: src/mainboard: Remove unnecessary whitespace before "\n"

[HAOUAS Elyes (ehaouas@noos.fr)]

HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16283

-gerrit

commit 9f90efee4bc9d61cbb3699b40110dd16855948b3
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date:   Sun Aug 21 12:19:25 2016 +0200

    src/mainboard: Remove unnecessary whitespace before "\n"
    
    Change-Id: I9789b0b3339435fbe30c69221826bf23c9b3c77b
    Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
 src/mainboard/amd/bettong/romstage.c       | 4 ++--
 src/mainboard/amd/db-ft3b-lc/romstage.c    | 4 ++--
 src/mainboard/amd/lamar/romstage.c         | 4 ++--
 src/mainboard/amd/olivehillplus/romstage.c | 4 ++--
 src/mainboard/bap/ode_e21XX/romstage.c     | 4 ++--
 src/mainboard/iwave/iWRainbowG6/romstage.c | 2 +-
 6 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/src/mainboard/amd/bettong/romstage.c b/src/mainboard/amd/bettong/romstage.c
index b0ec8fd..c3e2aa4 100644
--- a/src/mainboard/amd/bettong/romstage.c
+++ b/src/mainboard/amd/bettong/romstage.c
@@ -52,8 +52,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	/* Load MPB */
 	val = cpuid_eax(1);
-	printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
-	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
+	printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
+	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
 
 	post_code(0x37);
 	AGESAWRAPPER(amdinitreset);
diff --git a/src/mainboard/amd/db-ft3b-lc/romstage.c b/src/mainboard/amd/db-ft3b-lc/romstage.c
index c64fe4e..f69e188 100644
--- a/src/mainboard/amd/db-ft3b-lc/romstage.c
+++ b/src/mainboard/amd/db-ft3b-lc/romstage.c
@@ -65,8 +65,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	/* Load MPB */
 	val = cpuid_eax(1);
-	printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
-	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
+	printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
+	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
 
 	post_code(0x37);
 	AGESAWRAPPER(amdinitreset);
diff --git a/src/mainboard/amd/lamar/romstage.c b/src/mainboard/amd/lamar/romstage.c
index bcf49e0..f084582 100644
--- a/src/mainboard/amd/lamar/romstage.c
+++ b/src/mainboard/amd/lamar/romstage.c
@@ -75,8 +75,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	/* Load MPB */
 	val = cpuid_eax(1);
-	printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
-	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
+	printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
+	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
 
 	post_code(0x37);
 	AGESAWRAPPER(amdinitreset);
diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c
index a5c529e..6d1e4ea 100644
--- a/src/mainboard/amd/olivehillplus/romstage.c
+++ b/src/mainboard/amd/olivehillplus/romstage.c
@@ -65,8 +65,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	/* Load MPB */
 	val = cpuid_eax(1);
-	printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
-	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
+	printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
+	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
 
 	/*
 	 * This refers to LpcClkDrvSth settling time.  Without this setting, processor
diff --git a/src/mainboard/bap/ode_e21XX/romstage.c b/src/mainboard/bap/ode_e21XX/romstage.c
index 8466e25..e45464e 100644
--- a/src/mainboard/bap/ode_e21XX/romstage.c
+++ b/src/mainboard/bap/ode_e21XX/romstage.c
@@ -69,8 +69,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	/* Load MPB */
 	val = cpuid_eax(1);
-	printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
-	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
+	printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
+	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
 
 	post_code(0x37);
 	AGESAWRAPPER(amdinitreset);
diff --git a/src/mainboard/iwave/iWRainbowG6/romstage.c b/src/mainboard/iwave/iWRainbowG6/romstage.c
index a6c5a71..9750d08 100644
--- a/src/mainboard/iwave/iWRainbowG6/romstage.c
+++ b/src/mainboard/iwave/iWRainbowG6/romstage.c
@@ -259,7 +259,7 @@ int selectcard(void)
 {
 	int i;
 
-	printk(BIOS_DEBUG, "%s", "\r\nCase 9....... \n\r");
+	printk(BIOS_DEBUG, "%s", "\r\nCase 9.......\r\n");
 	// send the length byte and command code through RFID interface
 
 	transaction1(RFID_ADDR);