[coreboot-gerrit] New patch to review for coreboot: soc/intel/skylake: align chromium Chrome OS config

Aaron Durbin (adurbin@chromium.org) gerrit at coreboot.org
Wed Aug 24 15:51:35 CEST 2016


Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16313

-gerrit

commit fa98dc21b05f5e3aba3edfd6565ec44a3c764e62
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Aug 24 08:49:29 2016 -0500

    soc/intel/skylake: align chromium Chrome OS config
    
    The chromium tree is currently using a different config for
    Chrome OS than what is being built in coreboot.org. Align those
    settings to reflect how skylake Chrome OS boards are actually
    shipped to provide proper parity between coreboot.org and chromium.
    
    Change-Id: I7ab9c1dfa8c6be03ac2125fb06cb7022f3befa97
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/intel/skylake/Kconfig      | 3 +++
 src/soc/intel/skylake/Makefile.inc | 1 +
 2 files changed, 4 insertions(+)

diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 7fa129b..7db1690 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -56,13 +56,16 @@ config CPU_SPECIFIC_OPTIONS
 config CHROMEOS
 	select CHROMEOS_RAMOOPS_DYNAMIC
 	select EC_SOFTWARE_SYNC if EC_GOOGLE_CHROMEEC
+	select SEPARATE_VERSTAGE
 	select VBOOT_EC_SLOW_UPDATE
 	select VBOOT_OPROM_MATTERS
 	select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT
+	select VBOOT_STARTS_IN_BOOTBLOCK
 	select VBOOT_VBNV_CMOS
 	select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH
 	select VIRTUAL_DEV_SWITCH
 
+
 config BOOTBLOCK_RESETS
 	string
 	default "soc/intel/common/reset.c"
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index b92eab3..716c3d5 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -28,6 +28,7 @@ bootblock-y += pmutil.c
 bootblock-y += tsc_freq.c
 
 verstage-y += flash_controller.c
+verstage-y += monotonic_timer.c
 verstage-y += pch.c
 verstage-$(CONFIG_UART_DEBUG) += uart_debug.c
 



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